To solve a performance bottle neck in random access LANs due to packet collisions and their resolution, collision avoidance switches are introduced. These switches allow random access protocols to achieve high performance by resolving collisions among packets. A conventional hardware implementation of these switches is the use of TTL chips. In this implementation; a handful of TTL chips are required to forma single switch (e.g., 18 TTL chips are needed for an implementation of the CAMB switch [7]). Thus, implementation of a complete network, which requires several of these switches, could very well result in a large and complex hardware system.Today's modern chip technology allows us to pack large quantity of logic in a single chip. By transferring the conventional implementation of the collision avoidance switches into a VLSI chip, the complexity of the resultant hardware is greatly reduced, not to mention the improvement in hardware performance and ease of packaging.This report provides an overall study of the collision avoidance protocols for the tree LANs with emphasis on the implementation of collision avoidance switches. Hardware implementations of sorne of these switches are discussed. And a VLSI implementation of the CAMB switch protocol is introduced
