An OTDM router architecture using a highly scalable time slot tuner is discussed. Results for a 100-Gb/s, 16-channel router using a computer-controlled interface are presented. The scalability and latency of the router based upon the time slot tuner shows that aggregate bandwidths beyond 1 Tb/s are possible. We show that a maximum hardware time slot access latency of less than 3.2 ns can be achieved with this architecture enabling ultrafast optical packet routing

Deng, K.-L.

Glesk, Ivan

Prucnal, P.R.

Runser, Robert J.

Toliver, P.

English

University of Strathclyde Institutional Repository

Strathprints Institutional RepositoryRunser, Robert J. and Deng, K.-L. and Toliver, P. and Glesk, Ivan and Prucnal, P.R. (1999)Highly scalable optical TDM router using a computer controlled time slot selector with picosecondresolution. In: Photonics in Switching. OSA Trends in Optics and Photonics, 32 . Optical Society ofAmerica, Washington, DC, pp. 83-88. ISBN 1557525900Strathprints is designed to allow users to access the research output of the University of Strathclyde.Copyright c© and Moral Rights for the papers on this site are retained by the individual authorsand/or other copyright owners. You may not engage in further distribution of the material for anyprofitmaking activities or any commercial gain. You may freely distribute both the url (http://strathprints.strath.ac.uk/) and the content of this paper for research or study, educational, ornot-for-profit purposes without prior permission or charge.Any correspondence concerning this service should be sent to Strathprints administrator:mailto:strathprints@strath.ac.ukhttp://strathprints.strath.ac.uk/Highly scalable optical TDM router using a computer controlled time slot selector with picosecond resolution Robert J. Runser, Kung-Li Deng, Paul Toliver, Ivan Glesk, and Paul R. Prucnal Department of Electrical Engineering, Princeton University B-204 E-Quad, Olden Street, Princeton, NJ 08544 rrunser@ee.princeton.edu Abstract: An OTDM router architecture using a highly scalable time slot tuner is discussed. Results for a 100-Gb/s, 16-channel router using a computer-controlled interface are presented. The scalability and latency of the router based upon the time slot tuner shows that aggregate bandwidths beyond 1 Tb/s are possible. We show that a maximum hardware time slot access latency of less than 3.2 ns can be achieved with this architecture enabling ultrafast optical packet routing. OCIS codes: Multiplexing (060.4230), Networks (060.4250), Optical Communications (060.4510) Introduction Although lightwave technology is meeting the demand for point-to-point and long-haul transport of digital information, routing packets at the nodes of the network has typically been carried out using electronically switched backplane routers. The growing capacity on the Internet is placing an ever-greater demand on electronic routing technologies. While WDM can support large aggregate traffic bandwidths, it is difficult to perform routing functions that may involve challenging techniques such as dense wavelength conversion. Additionally, present WDM laser and filter tuning techniques rely upon slow technologies that increase the channel access latency and reduce the effective network bandwidth. Recent advances in optical time division multiplexing (OTDM) have proven this technology's ability to handle the switching and routing needs for future networks [ 1 - 3 ] . Channel access in OTDM networks is achieved by using time slot tuners and all-optical demultiplexers. Timing precision of less than 1 ps is required to tune, multiplex, and demultiplex individual channels within the OTDM frame. OTDM Router Design The router architecture we are constructing is based upon an OTDM interconnect shown in Fig 1. Like a standard electronic router, line cards interface network gateways and backbones to the backplane of the router. A client interface connects the line cards to the OTDM interconnect which replaces an electronically switched backplane. Addresses are mapped to specific time slots within the network. Routing is achieved by sending each bit of the packet in a unique time slot corresponding to its destination node. Splitting and amplifying the optical output of a single modelocked fiber laser synchronizes all nodes in the network. A time slot tuner performs data modulation and transmits the data into a given time slot. The data pulses are precisely multiplexed into an OTDM frame that contains traffic from all nodes. Each node receives data from a given time slot by using a time slot tuner to align the clock with an incoming time slot within the frame for all-optical demultiplexing. Packet routing is OSA TOPS Vol. 32 Photonics in Switching Paul R. Prucnal and Daniel J. Blumenthal, eds. nq ©2000 Optical Society of America Photonics in Switching performed by rapidly changing the state of the time slot tuner to transmit into time slots corresponding to destination addresses. We have recently demonstrated [4] an error-free 100-Gb/s broadcast star architecture that can be used as the backplane for this router. The key subsystem that determines the scalability and latency of the router is the time slot tuner. In this paper, we fully demonstrate computer control of a time slot tuner with <1 ps timing accuracy and hardware latency on the order of the single channel bit period. We analyze the router scalability based upon the time slot tuner and show that the architecture can offer greater than 1 Tb/s aggregate bandwidth and support over 1000 nodes. This represents an order of magnitude improvement over current, state-of-the-art electronic routers. Time Slot Tuner Design and Operation Previously we demonstrated a 1024 channel time slot tuner capable of accessing channels from an aggregate bit rate of 50 Gb/s using manual control [5]. In this demonstration, we show computer controlled tuning of a 16-channel, 100-Gb/s time slot tuner. The time slot tuner schematic is shown in Fig. 2. It consists of two gating modulators, cascaded stages of feed-forward Mach-Zehnder fiber lattices, and a computer interface board for each modulator. The relative delays of the fiber lattices increase as (T - t), 2(T~ T), ... 2k'1(T - x) where k is the number of delay stages, T is related to the single channel bit rate, B, as B = (2kT)A, and 1/T is the peak bandwidth accessible by the tuner. The overall number of channels accessible by the tuner is given by the product (2kx2k). As a result, the overall bandwidth of the router is given as B x (2kx2k). When the OTDM frame is completely populated, the aggregate router bandwidth equals the subcell bandwidth, B x (2kx2k)= 1/z The principle of operation of a 2 (= k) stage time slot tuner is explained in Fig. 3. A repetitive pulsed mode-locked laser feeds the optical input of the time slot tuner at a rate of 1/T. Each pulse that enters the two-stage delay line is copied four times and each copy arrives at the output in a unique time slot. In the case of the two-stage tuner, four pulses arrive and travel through the delay lattice during the single channel bit period, 1/B. Since each pulse is copied four times, the two-stage tuner provides the ability to access up to 16 unique time slot channels. As shown at the point labeled lnterm. on Fig. 3, the 16 copies are arranged into 4 subcells where the inter-subcell pulse spacing is the small time interval t. 84 Photonics in Switching Using the gating modulators, MOD 1 and MOD 2, a single channel may be selected for transmission into the desired time slot. In Fig. 3, we show an example of tuning to channel 10. Picosecond pulses enter the delay lattice at the Optical Input. The Optical Input shown in Fig. 3 illustrates a train of pulses beginning with S2. (Note that copies of S / and Si that appear at Interm. result from previous pulses not shown at the Optical Input.) The MOD 1 gating function selects input pulse S4 that, after propagating through the delay lattice, populates time slots 4,1, 10, and 13 at the intermediate point (Interm. labeled on Figs. 2 and 3). By choosing the gating function of MOD 2, channel 10 can be selected. A key feature of the time slot tuner is that the bandwidth of the electronics needed to produce the modulator gating functions is equal to the repetition rate of the laser, 1/T, which can be several orders of magnitude below the subcell rate of 7/Tand the aggregate router bandwidth. 85 Photonics in Switching Experimental Results Fig. 4 shows the results of interfacing a two stage (k = 2) time slot tuner to a computer controller board that provides the capability of accessing 16 (= 2k x 2k) channels from a 100-Gb/s time frame with low latency. The channels populate the 1.6 ns (= l/B) time frame in four subcells each containing four channels. The inter-subcell pulse spacing is 10 ps (= f) providing a 100-Gb/s subcell bandwidth. For simplicity, we transmitted all ones into each of the 16 channels. Although the pulses in the 10-ps time slots are approximately 2 ps at FWHM, the output is broadened on a bandwidth-limited photodetector and oscilloscope. The computer interface board has the capability of accessing any of the channels in the time frame with a maximum hardware latency of less than 3.2 ns governed by the build-up time of pulses entering the time slot tuner [5]. Tuning Latency and Router Scalability The latency of tuning the time slot selector is governed by the build-up time of the pulses in the delay lattice. The time frame that is accessible by the two-stage tuner contains Channels 1 through 16 within the single channel bit period l/B. However, as shown in Fig. 3, the pulses that make-up the 16 channel 86 Photonics in Switching frame include pulses Si through S4 as well as Si', S2', and 83'. As a result, tuning among all 16 channels will result in a different latency. Table 1 summarizes the latency required to tune from Channel 1 to any of the other 15 channels in the time frame. The worst case, tuning to Channel 13 takes approximately 7T or almost two OTDM time frames (= 2/B) while the best case is as fast as T. Relating these values to our experimental demonstration where T = 400 ps and 1/B = 1.6 ns, the maximum tuning latency from Channel 1 is less than 3.2 ns. Typical channel access time is 4T (= 1/B) which is the single channel bit period. Given that typical packets contain thousands of bits, the tuning latency is negligible as compared to the packet time. By combining this subsystem with a highly efficient arbitration protocol [6], near lossless channel allocation with low latency can be achieved for all optical packet routing. The scalability of an OTDM interconnect router based upon the time slot tuner is the key feature which enables high performance with relatively low hardware requirements. Table 2 summarizes these characteristics. The top row provides the results of the current experimental demonstration. As indicated by the table, this router has the capability of supporting thousands of nodes with an aggregate bandwidth beyond 1 Tb/s. Using commercially available components, the scalability of the router is limited by crosstalk among channels accessed by the time slot tuner. A study of the crosstalk requirement indicates that a 1024 node OC-12 router with an aggregate throughput of 1 Tb/s is feasible [7]. 87 Photonics in Switching Acknowledgement The authors would like to thank G.K. Chang for helpful discussions and T. Sze, R. Lytel, and H. Davidson for constructing the computer interface board. We also thank Christine Coldweli for carefully reading the manuscript. This work has been supported by DARPA Contract No. F30602-97-0316. References 1. R.A. Barry, V.W.S. Chan, K.L. Hall, E.S. Kintzer, J.D. Moores, et ah, "All-optical network consortium - ultrafast TDM networks," IEEE J. Sel. Areas Commun., 14, pp. 999-1011 (1996). 2. J.K. Lucek, P. Gunning, D.G. Moodie, K. Smith, and D. Pitcher, "Synchrolan: a 40 Gbit/s optical-TDMA LAN," Electron. Lett., 33, pp. 887-888 (1997). 3. M. Tsukada, W. De Zhong, T. Matsunaga, A. Masaki, and T. Oohara, "An ultrafast photonic ATM switch based on bit-interleave multiplexing," /. Lightwave TechnoL, 14, pp. 1979-1985 (1996). 4. K.-L. Deng, RJ. Runser, P. Toliver, C. Coldweli, D. Zhou, I. Glesk, and P.R. Prucnal, "Demonstration of highly scalable computer interconnect with rapid interchannel switching capability," Electron. Lett., 34, pp. 2418-2419 (1998). 5. K.-L. Deng, K.I. Kang, I. Glesk, and P.R. Prucnal, "A 1024-channel fast tunable delay line for ultrafast all-optical TDM networks," IEEE Photon. TechnoL Lett., 9, pp. 1496-1498 (1997). 6. A.G. Nowatzyk and P.R. Prucnal, "Are crossbars really dead? The case for optical multiprocessor interconnect systems," Proc. 22nd Int. Symp. Computer Architecture, Santa Margherita, Italy, June 1995. 7. K.-L. Deng, I. Glesk, K.I. Kang, and P.R. Prucnal, "Influence of crosstalk on the scalability of large OTDM interconnects using a novel rapidly reconfigurable highly scalable time-slot tuner," IEEE Photon. TechnoL Lett., 10, pp. 1039-1041 (1998). 88 

A 1024-channel fast tunable delay line for ultrafast all-optical TDM networks,&quot;

An ultrafast photonic ATM switch based on bit-interleave multiplexing,&quot;

Are crossbars really dead? The case for optical multiprocessor interconnect systems,&quot;

Demonstration of highly scalable computer interconnect with rapid interchannel switching capability,&quot;

et ah, &quot;All-optical network consortium - ultrafast TDM networks,&quot;

Influence of crosstalk on the scalability of large OTDM interconnects using a novel rapidly reconfigurable highly scalable time-slot tuner,&quot;

Synchrolan: a 40 Gbit/s opticalTDMA LAN,&quot;

Highly scalable optical TDM router using a computer controlled time slot selector with picosecond resolution

Name not available

http://www.opticsinfobase.org/abstract.cfm?URI=PS-1999-83&origin=search

Highly scalable optical TDM router using a computer controlled time slot selector with picosecond resolution

Abstract

Similar works

Full text

Available Versions

University of Strathclyde Institutional Repository

Name not available