The present state-of-the-art in computer hardware has outpaced the current state of the distributed JIT (Just-In-Time) compilers. We have resorted to modifying our Java code to make use of JNI (Java Native Interface) based vector-accelerated C programs to obtain speed-ups from 2 to 10 times

Lyon, Douglas A.

English

Fairfield University: DigitalCommons@Fairfield

Fairfield University DigitalCommons@Fairfield Engineering Faculty Publications School of Engineering 3-2005 Java Optimization for Superscalar and Vector Architectures Douglas A. Lyon Fairfield University, dlyon@fairfield.edu Follow this and additional works at: https://digitalcommons.fairfield.edu/engineering-facultypubs Copyright 2005 Journal of Object Technology Archived with permission from the copyright holder. Peer Reviewed Repository Citation Lyon, Douglas A., "Java Optimization for Superscalar and Vector Architectures" (2005). Engineering Faculty Publications. 51. https://digitalcommons.fairfield.edu/engineering-facultypubs/51 Published Citation Douglas Lyon, “Java Optimization for Superscalar and Vector Architectures”, Journal of Object Technology, Volume 4, no. 2 (March 2005), pp. 27-39. This item has been accepted for inclusion in DigitalCommons@Fairfield by an authorized administrator of DigitalCommons@Fairfield. It is brought to you by DigitalCommons@Fairfield with permission from the rights-holder(s) and is protected by copyright and/or related rights. You are free to use this item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses, you need to obtain permission from the rights-holder(s) directly, unless additional rights are indicated by a Creative Commons license in the record and/or on the work itself. For more information, please contact digitalcommons@fairfield.edu. 

Java Optimization for Superscalar and Vector Architectures

https://digitalcommons.fairfield.edu/cgi/viewcontent.cgi?article=1045&context=engineering-facultypubs

Java Optimization for Superscalar and Vector Architectures

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