Lately, there has been a dramatically increase in demand for power electronics having reduced size, weight, and cost as well as improved dynamic performance. The dimension of a power electronic circuit mainly depends on passive components (inductor, capacitor). Increasing the switching frequency does not only leads to decrease in dimensions and weight but also provides faster transient response.
The proposed converter is a buck (step-down) converter, with no external controller. By the feedback system it has, it provides constant duty ratio of around 50%. The defined ranges for the converter is 3.5 MHz, 3.5V-24V input voltage and 2V-12V output voltage. The lowest values for efficiency is defined as 70%.
Since in the market, all high speed converters are on silicon, it makes them expensive to manufacture. Hence, in this converter, we are using real components from the market and later on will be assembled on a PCB. It will decrease the efficiency but the prices of manufacturing is dramatically reduced. Most important is taking parasitics into account which can kill the circuit otherwise. The proposed circuit topology with suitable gate drives is a new thing, and from business point of view, it is easy and cheap.
Switching point is primary side of the transformer, hands over the sending power to the output load, and secondary side of the transformer provides inductive feedback. Thanks to inductive feedback, it provides fast response and adaptive dead-time to eliminate dead-time losses. Two different kind of gate drive circuitries are integrated to converter switches: resonant gate drive and dead-time latch circuitries. They are applied to switches which are responsible for the major part of the power losses. The overlapping time with main NMOS and PMOS switch is removed, and soft switching is observed at gate drives. Hence, around 4% efficiency increase is realized overall.
Cascaded MOSFETs are introduced in order to make it available for also high voltage applications. Main NMOS and PMOS transistors work complimentary, meaning that once NMOS in ON, PMOS is OFF and vice versa. When PMOS is ON, current flows from battery to load, pulls the switching point (Vx) to battery voltage. When NMOS is ON, current flows from load to ground over the NMOS and pulls down Vx to ground. After Vx point, by using a proper filtering technique, flat DC voltage is obtained at the output.
Using 3.8 V input voltage with 10 load, at the output 2.2 V is achieved with 27 mV voltage ripple. Efficiency is increased to 74% with 3.5 MHz switching frequency by the help of resonant gate drive and dead-time latch circuits. All parasitics are included and deeply studied with simulations conducted in LTSpice
