This paper deals with Gm-C biquadratic filters that use grounded capacitors. We derive all practical HP and notch filter topologies that do not require critical component matching. The aim of this derivation was to discover new architectures. The result of this derivation is quite unexpected: there are only three distinct topologies (one notch and: two high-pass). None of them is particularly new because all reported in the literature biquad circuits are their embodiments

Prodanov, Vladimir I.

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DigitalCommons@CalPoly

HIGH-PASS AND NOTCH Gm - (grounded) C BIQUADS: HOW MANY DIFFERENT TOPOLOGIES ARE THERE? Vladimir I. Prodanov Bell Laboratories/ Lucent Technologies 600 Mountain Ave., Murray Hill, NJ 07974 ABSTRACT This paper deals with Gm-C biquadratic filters that use grounded capacitors. We derive aJ practical HP and notch filter topologies that do not require critical component match- ing. The aim of this derivation was to discover new architec- tures. The result of this derivation is quite unexpected: there are only three distinct topologies (one notch and two high- pass). None of them is particularly new because all reported in the literature biquad circuits are their embodiments. 1. INTRODUCTION In general there are two analog filter synthesis techniques: the prototype-based technique and the biquad-based tech- nique. Active filters based upon a passive prototype have lower sensitivity to component mismatch than their biquad counterparts. Biquad-based filters, on the other hand, allow for easier on-chip automatic tuning1. Both filter structures can be implemented using op-amp based integrators or Gm- C integrators. Because of their ”open-loop’’ nature Gm-C integrators exhibit lower phase ”errors” at higher frequency; thus they are better suited for implementation of high-frequency fil- ters. Gm-C filter architectures that use only grounded ca- pacitors are of special interest, because standard (digital) CMOS process does not provide high-density linear float- ing capacitors. It is well known that low-pass and band-pass filter char- acteristics can be obtained (simultaneously) from a set of integrators2 connected in a loop. This is also true if the in- tegrators are of the type Gm-(grounded) C. Hence, the im- plementation of LP and BP biquadratic filters using only grounded capacitors does not present a problem. mission zeroes (in theory) can be obtained from the same architecture by taking weighted sum of the input signal and the produced LP and BP output signals [5], i.e. Second order transfer functions having pair of finite trans- ’ ”master-slave” or VCO-based tuning ‘One integrator is ”lossy” while the other one is ”lossless” i.... ....... i ; ...... c I .......... .................. 1 - - - -  coi i icm ortplrrrirrirs desi red izolrnge into ~iiri-riir istyrd~~~cr/r~nrisir,lDerlnncc Figure 1 : Conceptual schematic of Gm-(grounded)C bi- quad. In practice however this approach fails to produce robust high-pass and notch filter characteristics. The reason is that here the ”missing” numerator terms are obtained via can- cellation. Thus, the attainable attenuation is determined by component matching and it is limited to 35 - 40dB. Alternative high-pass architectures with no requirements for critical component matching can be found in [ 11, [ 2 ] ,  [3] .  [4], [5] ,  [6] and probably many other publications. Gm - (grounded) C notch architectures with no component match- ing requirements have been reported in at least two papers While each of these fine publications provides a ”good set” of filter topologies none of them seems to clearly iden- tify the ”complete set”. The aim of this paper is to derive the coinplere set of practical HP and notch filter topologies that do not require critical component matching. PI, [ a .  2. PRELIMINARY CONSIDERATIONS Here will we assume that single-input/single-output (SI/SO) transconductors are to be used. Once the filter topology is determined, constraints related to a specific transconductor topology could then be taken into account. For example, two SI/SO transconductors whose outputs are coupled could be replaced by a single differential-input/SO transconductor after imposing the following two requirements: l g m 1  I = lgrns I & sigr/,[,qnzl] = - . s I :g i i . [g~m]  Such considerations are not required when implement- ing fully-differential filters” A fully-differential design is ’In products, fully-differential designs are usually used. 0-7803-6685-910 1 /$10.000200 1 IEEE t-21 2: A general two-node Gm-(grounded)C network. obtained directly from the single-ended filter topology if each S I / S O  transconductor is replaced by a DI/DO transcon- ductor and the number of capacitors is doubled. Biquads must be implemented in such a way that their natural frequencies are not affected by the cascading. This suggests that a cascadable Gm-(grounded)C biquad must have high input impedance, i.e. it must have the topology shown in Fig. 1. The input transconductor(s) in Fig. 1 ar- chitecture converts the applied input voltage into current(s). The produced current(s) is(are) then injected into a network comprised of two grounded capacitors and several transcon- ductor blocks. The network converts the injected current(s) into voltages. Any of these voltages4 can than be taken as an output voltage. We see that for a given Gm - (grounded)C network (mathematically described by either its admittance matrix [l'(s)] or its impedance matrix [ Z ( s ) ] )  many but fi- nite number of transfer functions can be implemented. Thus, the study of only few Gm-C networks can yield information about large number of biquad configurations. In the next two section several Gm-(grounded)C net- works will be derived and studied. 3. THE TWO-NODE NETWORK Among all networks that can exhibit second-order response Fig. 2 is the one with minimum number of nodes - only two. The admittance matrix of this circuit, i.e. can be inverted to obtain circuit's impedance matrix: This matrix tells us how Fig. 2 "converts" injected currents into voltages. Thus, it shows the type of transfer functions that one can implement. It can be easily verified that the above four entries are: z l l  = K!r+sC'a a D ( s )  *I2  = D(s) 3 l l + S c ' l  x z l  D ( s )  222 = ' o(s) where: D ( s )  = s2C1C2+s(Cly.J2 + C ~ y l l ) + g l l g ~ ?  - 9 1 2 ~ 2 1  Since none of the four numerators contains an s ' term Fig. 2 circuit can not be used to implement high-pass, notch 01' any other trnrisfer function that has a pair of transmis- "Circuit temunal potentials "measured" with respect to ground Figure 3: Conceptual schematic of Gm-(grounded)C biquad capable of implementing transfer functions with second- order numerator. 4. THE THREE-NODE NETWORK The next in complexity network is the three-node network. Since we are concemed with circuits that exhibit a second- order response, only two of the three nodes (say nodes "1" and "2") should be capacitively loaded. The admittance ma- trix of such a circuit is thus given by:' 911 + s c 1  g12 I'(s) = g21 9 2 2  + sc2 923 g1  1 (3) [ Q31 Q32 g33 - Z ( s )  = z21(s) Z 2 2 ( S )  m ( s )  ] Inverting the above matrix we obtain circuit's impedance matrix, i.e. z11(s) Z l P ( s )  213(s) [ z3l(s) 232(s) 2 3 3 ( s )  (4) Only z33 entry of the 2 matrix has second-order numerator. N233 = g33[s2C1 c2 +s(C*y11 +Cl9221 +g11g22 -9129211 ( 5 )  1-22 Thus, using a three-node network one can implement trans- fer functions with second-order numerators. All such imple- mentations however will have the same topology - the one shown in Fig. 3. The denominators of all z tJ  (s) entries are the same and equal to the determinant of I'(s). 4.1. Robust Notch Topologies Since the zeroes of an ideal notch transfer function are lo- cated on the imaginary axes, both 911 and 9 2 2  must be 0. With this restriction the numerator of 2 3 3  becomes: and the denominator becomes: N:, , (S)  = S'ClC2933 - glZg"l933 The poles and the zeroes of a robust notch filter must have the same imaginary parts. Hence, the pole and the zero imaginary part must be set by the same circuit elements. This suggests that the first two zero-order terms. of D ( s )  must equal zero, i.e. One might be tempted to set all four transconductances g13, 9 3 2 ,  ~ 3 1  and y23 to zero. This however would also nullify 911, g22 and gZ1 to zero. After considering the de- terminants of the resulting admittance matrices we find that in each case one additional transconductor can be removed '. Thus, after relatively straightforward considerations we find that total of four transconductances can be eliminated. The possibilities are: 1) 911 = g"2 = g12 = g 3 1  = 0; 2 )  9 1 1  = 9 2 2  = g 1 2  = g 2 3  = 0; 3) 9 1 1  = 922 = $ 2 1  = 9 1 3  = o; 4) 911 = g 2 2  = 921 = g 3 2  = 0; Figure 4: The only minimal three-node network (with grounded capacitors) that can be used to implement a ro- bust notch filter. denominator's first-order term. Hence, we have to choose ~ 1 3 ,  g32 ,  g31and 9 2 3  in such a way that either (7) or (8) is satisfied. These four possibilities lead to two distinct networks7. The networks have the following impedance matrices: 9 2 3 g 3 2  = 0 &L g 3 1 g 1 3  # 0 (7 )  Fig. 5(a) 1 923g3L' # 0 &L y31y13 = 0 (8) 1 [ S c 2 9 3 3  - 923932 913932 -sC2913 -921933 S e 1 9 3 3  - S c 1 9 2 3  + 913921 Restrictions (6) and (7) are simultaneously satisfied when D ( s )  921932 - S c 1 9 3 2  s"1 c2 923 = g 3 2  = 0 while restrictions (6) and (8) are satisfied when yI3  = yCIl = 0. In both cases we obtain the same min- imal network5 (e.g. Fig. 4). Thus, there is only one three- (10) where D ( s )  = s 2 C i C 2 g 3 3  - S c l g 2 3 9 3 2  + g 2 i g 1 3 g 3 2  Fig. 5(b) 1 node network thatcan be used to implement notch transfer function. The impedance matrix Z F , ! , . ~ ( S )  of this network is: SC2933 913932 - s c z g 1 3  - S c 2 9 3 1  + 921g32 - S c l g 3 2  s 2 c 1  c2 -921 933 s C l 9 3 3  - 913931 ?I3921 where D F , ~ . ~ ( S )  = s'C1C2y33 - .G~~I .YI :~  - g21912Y33.  Such derived impedance matrix shows that total of six S I l S O  transconductors are needed to realize Fig. 4-based biquad. 4.2. Robust High-Pass Topologies To obtain network that has high-pass response we have to make the zero-order and the first-order terms of (5) zero. This can be done by setting {JJ 1, 922 and g1.l to zero or by Figure 5: The only minimal three-node networks that can be used to implement high-pass transfer function. 'The difference is in the node labeling not the network connectivity. (11) where D ( s )  = . s 2 C 1 C 2 g 3 3  - s C l g 3 1 g 1 3  + g ~ l g n g 3 2 .  Again, total of six SIISO transconductors will be needed to realize Fig. 5(a) or Fig. 5(b) based HP biquads. Thus, a practical fully-differential HP biquad filter requires no less than six fully-differential transconductance elements. Naturally, the sign of the transconductors used must be chosen in such a way that a stable network is achieved. Such sign selection is not unique. The sign selection however is trivial and for that reason it will not be discussed here. gies allows for a classification of previously reported Gm - (grounded)C architectures. The classification of the cited in this paper architectures is given on the next page. Parasitic capacitive loading of node "3" affects all three- node architectures. This situation becomes even more prob- lematic if more "additional" nodes are introduced. For this reason, we believe that quad-node (see Fig. 4(a) in [3]) and other higher-order architectures are not worth considering. 5. AN ALTERNATIVE VIEW The implementation of a transfer function that has finite transmission zeroes calls for an implementation of a suit- able impedance (see Fig. 3). The impedances required for the implementation of notch and high-pass characteristics are respectively: The identification of the basic high-pass and notch topolo- Rs2 (12) R ( 5 ' + ~ 0 )  Rc z H p  = Z,rotch = s 1 +  a1s + a0 .S2 + a16 + a0 Using long division these two expressions yield Fig. 6 canon- ical forms. As illustrated in Fig. 7 the previously introduced 'For the case where y12 = 0 either 931 or 923 can be set to zero. For ' Conditions I ) and 4) yield Fig. 5(a) network while conditions 2) and the case where .q21 = 0 either 91:s or 1/32 can be set to zero. 3 )  yield Fig. 5(b). 1-23 (b) Figure 6: Impedances that must be realized to implement notch andhigh-pass transfer functions. Implementation Fig. 6(b) in [SI Fig. 1 in [6] Fig. 4(b) in [3] Fig. 4 in [6] Fig. 12(b) in [ 11 P I  Fig. 3 in [4] Fig. 6 (c) in [5] Fig. 2 in [6] Fig. 4 topology implements the required impedance. Fig. 6 high-pass canonical form contains a non-physical element: an inductive type frequency dependent negative resistance. Its implementation is shown in Fig. 8(a). There are two different ways to emulate the required inductor. As a result we obtain two different high-pass impedance topolo- gies: Fig. 8(b) and Fig. 8(c). These are identical to the pre- viously derived Fig. 5(a) and Fig. 5(b) topologies. Transfer Function Topology notch Fig. 4 notch Fig. 4 high-pass Fig. 5(a) high-pass Fig. 5(a) high-pass Fig. 5(b) high-pass Fig. 5(b) high-pass Fig. 5(b) high-pass Fig. 5(b) high-pass Fig. 5(b) 6. CONCLUSIONS We have shown that circuits with grounded capacitors that implement transfer functions with second-order numerator have at least three distinct nodes (four nodes if input node is counted). We have shown that there is only one architecture that implements robust notch transfer function and only two dis- tinct architectures that implement robust high-pass transfer function8. We have argued that if only grounded capacitors are used, at least six transconductors will be needed to imple- ment high-pass and notch transfer functions. 7. REFERENCES [l] E. Sinchez-Sinencio, R. L. Geiger and H. Nevarez- Lozano, “Generation of continuous-time two integrator loop OTA filter structures,”IEEE Transactions on Cir- cuits and Systems, vol. 35, no. 8, pp. 936-945, 1988. ‘These implementations also yield (as a biproduct) a large number of different low-pass and band-pass architectures. All of which allow inde- pendent frequency and Q tuning. Figure 7: Emulation of Fig. 6(a) canonical form. A I T Figure 8: Emulation of Fig. 6(b) canonical form. J. Wu and C.Y. Xie,“New multifunction active filter us- ing OTAs,”hiteriiatioiiaI Jouriial of Electronics, vol. 74, no. 2, pp. 235-9. 1993. Y. Sun and J. Fidler, ‘‘ Structure generation of current- mode two integrator loop dual output-OTA grounded capacitor filters,” IEEE Ti-ansactioris on Circuits arid Systems-11, vol. 43, no. 9, pp. 659-663, 1996. T. Tsukutani et a1 “Versatile current-mode biquad fil- ter using multiple current output OTA’s,”Iizterriatiorzal Journal of Electronics, vol. 80. no. 4, pp. 533-541, Apr. 1996. [5] V.I. Prodanov and M.M. Green, “ Improved biquad structures using double-output transconductance blocks for continuous time filters,” Aiialog Integrated Circuits arid S igr id  Processing, vol. 13, no. 3, pp. 233-240, July 1997 [6] Chun-Ming Chang, *‘ New multifunction OTA-C Bi- quads,’’ IEEE Transactions on Circuits and SvstenwII, vol. 46, no. 6, pp. 820-4. 1999. 1-24 

Robust High-pass and Notch Gm - (grounded) C Biquads: How Many Different Topologies Are There?

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Robust High-pass and Notch Gm - (grounded) C Biquads: How Many Different Topologies Are There?

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