A current research project at IMAG/TIM3 Laboratory aims at an integrated test system
combining the use of the Scanning Electron Microscope (SEM), used in voltage contrast
mode, with a new high-level approach of fault location in complex VLSI circuits, in order
to reach a complete automated diagnosis process.
Two research themes are induced by this project, which are: prototype validation of
known circuits, on which CAD information is available, and failure analysis of unknown
circuits, which are compared to reference circuits.
For prototype validation, a knowledge-based approach to fault location is used.
Concerning failure analysis, automatic image comparison based on pattern recog-
nition techniques is performed.
The purpose of the paper is to present these two methodologies, focusing on the
SEM-based data acquisition process
