This thesis deals with a different approach to switched-capacitor filters than previously seen by the use of a Sallen and Key topology. It is shown that a Sallen and Key second-order topology approach to a switched-capacitor filter gives reasonable filter performance results, contrary to what the literature leads one to expect. It is also shown that the Sallen and Key second-order topology with modification to a third-order section with buffers results in a high performance switched-capacitor filter with fewer components than previous switched-capacitor filters. This results in fewer monolithic chip size requirements, reduced power requirements, and less cost. Higher order filters could be obtained by cascading either one of the second- or third-order switched-capacitor sections together. Desired filter Q values and cutoff frequencies are shown to be obtained by changing the capacitor ratios and clock frequencies, respectively
