This paper presents a field programmable gate array (FPGA) based embedded system for low power message display. Scanning technique is used to minimize the power consumption. The experiment is conducted on 30 seven segments where an field programmable gate array based intelligent controller scans all the display elements continuously at a certain speed to ensure only one display unit is on and other are off at a given time but human eyes cannot detect it. The test result shows the significant reduction of power consumption over static display system. That is very essential of power efficient solution for the portable electronic system

Motiur, M.

Saharia, K.

English

Universiti Teknikal Malaysia Melaka: UTeM Open Journal System

Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018  FPGA BASED MASSAGE DISPLAY SYSTEM IMPROVEMENT USING SCANNING TECHNIQUE TO MINIMIZE POWER CONSUMPTION  K. Saharia*1, M. Motiur1  1Department of Electrical & Electronic Engineering, Pabna University of Science & Technology, Pabna 6600, Bangladesh.   ABSTRACT  This paper presents a field programmable gate array (FPGA) based embedded system for low power message display. Scanning technique is used to minimize the power consumption. The experiment is conducted on 30 seven segments where an field programmable gate array based intelligent controller scans all the display elements continuously at a certain speed to ensure only one display unit is on and other are off at a given time but human eyes cannot detect it. The test result shows the significant reduction of power consumption over static display system. That is very essential of power efficient solution for the portable electronic system.  KEYWORDS: FPGA; ULN; Display; Message; Scanning; Low Power   1.0 INTRODUCTION  Electronic display-we see it everywhere, in computers, watches, DVD players and many other electronic devices to display numeric and some alphabetic characters (Azad et al., 2005; Karri & Orailoglu, 1990; Islam et al., 2006; Hossain & Habib, 2004; Bhunia et. al., 2004; Ruckmongathan, 2007). It is also used for showing messages in digital calendars, billboards, shopping malls, airports, stadiums and many other places. It is a commonly used and efficient way of displaying information. Although electronic display is widely used, power consumption is still an important issue (Moshnyaga & Morikawa, 2005; Ruckmongathan, 2009; Ruckmongathan et. al., 2006).   In an electronic circuit, the major part of the total power is consumed by the display elements. If a large amount of display units is used in a system, then the power requirement to run the system will also increase proportionately. In that case extra cooling arrangements may be required to keep the system workable. So the demands of low power consumption for field programmable gate array (FPGA) systems are motivating new approaches to manage power dissipation issues. Researchers have proposed plasma screen or organic light-emitting devices (OLED) to reduce power consumption for the display element (Aerts et. al., 2002; Kimmel et. al., 2002). Mohidur (2008) have studied about a microcontroller (μC) based system using scanning technique is proposed for low power message display. A μC based system is usually burdened with the problem of a limited number of pins, limited physical security and slow processing speed. Seven segment display with integrated controller and other circuitry are proposed to reduce the burden from the main controller. But in this case cost will be increased and power will be consumed by display control circuitry.                                                            * Corresponding Email: ksahariaiu@gmail.com Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018  The description of the scanning technique, algorithm, architecture and operation of the system and simulation result of the system will be the mian focus of this paper.   2.0 SCANNING TECHNIQUE  This paper concentrates on the power dissipation issues for display devices. A scanning technique has been introduced in the proposed to minimize the power consumption for display elements. The objective is to connect all the display elements in parallel with each other and turning only one unit on at a time for a very short period and move to the next unit. If each unit can be illuminated periodically in a very short span of time the human eye will see the entire message as if all the units are turned on whereas only one unit is on at any given time.   Here seven segment displays are used as display units and as a test case a Muslim Calendar (displays Date, Time and Prayer times of Five Salah) is developed with 30 units of seven segment display. Unique learner number (ULN) is used to select the corresponding display unit. ULN is a very fast device to turn on and turn off of display units. As the algorithm for illuminating display units follow the scanning technique only one unit of seven segment display is turned on at any given time. So, theoretically the total power consumption for illuminating display units is reduced by 30 times. Hence 30 units of seven segment displays can be illuminated by only the power required by one unit.  3.0 SYSTEM ARCHITECHTURE   The basic units of the proposed system can be divided into 7 parts, namely the FPGA, Display elements, Display decoder (CD4511BE), Real time clock (RTC), ULN (2803), Power unit and switches.  This is shown in Figure 1.    Figure 1. Block diagram of the system   Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018  The outputs of the ULN are connected to the common cathodes of 30 seven segment displays.  The output pins of the 7 segment decoder are connected in parallel to all seven segment displays. The FPGA sends appropriate input for the decoder when corresponding seven segment display has logic 0 (through ULN) at its common cathode.    A real time clock is used to keep the date and time. The FPGA reads the time from the RTC each minute and changes the display clock and date accordingly. The prayer timetable is loaded in the program memory of the FPGA as an array of structure. The prayer times change with the change of day and month field of the date. There is a battery connected to the RTC so that it can keep the time and date when the main power is not available. Three switches are used to set time and date. One switch is used to select which field of the time and date is to be changed. Other two switches are used to count up and count down the selected field. All these operation is controlled by the FPGA.  The main part of the system is the FLEX EPF10K70RC240-4 FPGA. All other components are connected to it and controlled by it. The four input pins of the seven segment decoder (CD4511BE) are connected to the first four pins of the FPGA. The input pins of the ULN are connected to the pins of the FPGA. All output pins of ULN connect to the common cathode pin of the 7 segment display sequentially. A 25.175MHz crystal oscillator is connected to the pin 91 of FLEX 10K FPGA.    4.0 SYSTEM OPERATION   In the proposed system a controller scans all the display units continuously to ensure that only one unit is on at any given time. In this way power consumption will be much lower than that of existing static display system. Here a ‘Muslim Calendar’ containing date, time and prayer times for five salah has been developed as a test case. Seven segment displays are used as display units.  Here the FPGA controls the input of the ULN and Decoder. The FPGA initializes all the output pins of the ULN at level 1 (sends logic 1 thirty times in the input of the ULN), making all the seven segment displays to be turned off. At this point the FPGA sends logic 0 once and logic1 29 times so that each display receives the signal 0 sequentially while other displays receive signal 1. In this process, only one display is turned at a time and shifted sequentially.    5.0 SIMULATION   The system is simulated using the Quartus II 7.0 simulator. The overall simulation is done using to the EPF10K70RC240-4 FPGA. It can be seen from the simulation that when one ULN passes signal low to the common cathode of a particular seven segment display at that time all other ULN passes the high signal to the common cathode of the others 7 segment display. When a seven segment display gets low signal in Common Cathode then it show the corresponding data passes by 7 segment decoder. Seven Segment decoder gets input from FPGA controller and passes to 7 segment display. Seven segment display is selected by ULN. This is shown in Figure 2.  Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018    Figure 2. Simulation Result  Figure 3 shows a sample /partial test case result where 5 prayer time of Muslim calendar are displayed.  It is possible to add more display unit on the board and can be controlled by using only one seven segment decoder and FPGA using scanning technique.     Figure 3. Test case result   Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018  6.0 RESULTS AND DISCUSSION   Scanning technique is a power aware solution for message display. Here we have used 30 seven segment displays. But as scanning technique is applied, at any given time only one seven segment display is on. So, theoritically the system should consume 1/30 times less power than it would take to make all the seven segment displays on at a time.  But following table shows the practical senario.  Current and Power Consumption by the Display Elements are as follows. Agilent Technologies 0.56” (14.2 mm) seven segment display are used in the practical experiment.   Table 1. Current and power consumption for 30 units of seven segment displays   With Scanning Technique Without Scanning  Technique Current Consumption 18 mA 75 mA Power Comsumption 0.09 Watt 0.375 Watt  In practicality, the power consumption is not as less as 30 times of the total power needed. But still it minimizes the power consumption to a considerable amount that is 76% less power is required to run the display units of the system when the scanning technique is applied.  The seven segment displays used as display units consume less power when scanning technique is used. Since the algorithm allows only one display unit to be illuminated at any given time rather than all the units receiving power, it consumes significantly less power. The scanning technique in the corresponding circuit requires only one Display Decoder for all the display units.    7.0 CONCLUSION  FPGA based embedded system implementing scanning technique can be used to design efficient, low power message displaying system. It eliminates limitations of pins, offers higher processing speed and physical security over microcontroller based system. Simulation result shows the proper functionality of the system. The test result proves the significant improvement in power reduction.    ACKNOWLEDGEMENT  The authors would like to thank Pabna Univeristy of Science & Technology (Department of Electrical & Electronic Engineering) and all its staff who have contributed their ideas and supportive materials to prepare this paper until submission.     Journal of Engineering and Technology ISSN: 2180-3811    Vol. 9 No. 2  July – December 2018  REFERENCES  Azad, M. A. K., Sharmeen, R., Ahmed, S. & Kamruzzaman, S. M. (2005). A unique 10 Segment Display for Bangla Numerals. 8th International Conference on Computer and Information Technology.  Karri, R. & Orailoglu, A. (1990). Standard Seven Segmented Display for Burmese Numerals. IEEE Transactions on Consumer Electronics, 36(4): 959-961.  Islam, R., Alam, M. G. R. & Uddin, M.N. (2006). An 8-Segment Display for Simple and Accurate Representation of Bangla Numerals. 4th International Conference on Electrical and Computer Engineering.  Hossain, G. & Habib, A.H.M.A. (2004). Designing Twin 7- segment Display for Bangla Numeric Characters. Asian Journal of Information Technology, 3(1): 56-68.  Bhunia, S., Mahmoodi, H., Mukhopadhyay, S., Ghosh, D. & Roy, K. (2004). A Novel Low-Power Scan Design Technique Using Supply Gating. IEEE International Conference on Computer Design, 1063-6404.  Ruckmongathan, T. N. (2007). A successive approximation technique for displaying gray shades in liquid crystal displays (LCDs). IEEE Trans. Image Process, 16(2): 554–561.  Moshnyaga, V.G. & Morikawa, E. (2005). LCD Display Energy Reduction by User Monitoring. IEEE International Conference, 94 – 97.   Ruckmongathan T. N. (2009). Low Power Techniques for Gray Shades in Liquid Crystal Displays. Journal Of Display Technology, 5(2):49-56.  Ruckmongathan, T. N., Govind, M. & Deepak, G. (2006). Reducing power consumption in liquid-crystal  displays. IEEE Trans. Electron Devices, 53(7): 1559–1566.  Aerts, W.F., Verlaak, S. & Heremans, P. (2002). Design of an Organic pixel Addressing Circuit for an Active-Matrix OLED Display. IEEE Transactions on Electron Devices, 49(12): 2124-2130.   Kimmel, J., Hautanen, L. & Levola, T. (2002). Display technologies for portable communication devices. IEEE, 90(4): 581-590.  Mohidur, R. K. (2008). Development of an embedded system for low power message display using scanning technique. (Unpublished masters dissertation). Institute of Information & Communication Technology, BUET, Dhaka, Bangladesh.  

FPGA Based Massage Display System Improvement Using Scanning Technique To Minimize Power Consumption

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FPGA Based Massage Display System Improvement Using Scanning Technique To Minimize Power Consumption

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