Berger, Michael Stübert

Leclerc, Y.

Olma, C.

Soler, José

Tsagkaropoulos,, M.

Yu, Hao

The MODUS project aims to provide a pragmatic and viable solution that will allow SMEs to substantially improve their positioning in the embedded-systems development market. The MODUS tool will provide a model verification and Hardware/Software co-simulation tool (TRIAL) and a performance optimisation and customisable source-code generation tool (TUNE). The concept is depicted in automated modelling and optimisation of embedded-systems development. The tool will enable model verification by guiding the selection of existing open-source model verification engines, based on the automated analysis of system properties, and producing inputs to be fed into these engines, interfacing with standard (SystemC) simulation platforms for HW/SW co-simulation, customisable source-code generation towards respecting coding standards and conventions and software performance-tuning optimisation through automated design transformations

Online Research Database In Technology

Methodology and Toolset for Model Verification, Hardware/Software co-simulation,Performance Optimisation and Customisable Source-code generation - DTU Orbit(09/11/2017) Methodology and Toolset for Model Verification, Hardware/Software co-simulation, Performance Optimisation andCustomisable Source-code generationThe MODUS project aims to provide a pragmatic and viable solution that will allow SMEs to substantially improve theirpositioning in the embedded-systems development market. The MODUS tool will provide a model verification andHardware/Software co-simulation tool (TRIAL) and a performance optimisation and customisable source-code generationtool (TUNE). The concept is depicted in automated modelling and optimisation of embedded-systems development. Thetool will enable model verification by guiding the selection of existing open-source model verification engines, based on theautomated analysis of system properties, and producing inputs to be fed into these engines, interfacing with standard(SystemC) simulation platforms for HW/SW co-simulation, customisable source-code generation towards respectingcoding standards and conventions and software performance-tuning optimisation through automated designtransformations. General informationState: PublishedOrganisations: Department of Photonics Engineering, Networks Technology and Service PlatformsAuthors: Berger, M. S. (Intern), Soler, J. (Intern), Yu, H. (Intern), Tsagkaropoulos, M. (Ekstern), Leclerc, Y. (Ekstern),Olma, C. (Ekstern)Pages: 169-178Publication date: 2013Main Research Area: Technical/natural sciences Publication informationJournal: W S E A S Transactions on Information Science and ApplicationsVolume: 6Issue number: 10ISSN (Print): 1790-0832Ratings: Scopus rating (2016): SJR 0.116 SNIP 0.482 Scopus rating (2015): SJR 0.162 SNIP 1.251 Scopus rating (2014): SJR 0.181 SNIP 0.377 Scopus rating (2013): SJR 0.144 SNIP 0.437 ISI indexed (2013): ISI indexed no BFI (2012): BFI-level 1 Scopus rating (2012): SJR 0.182 SNIP 0.591 ISI indexed (2012): ISI indexed no BFI (2011): BFI-level 1 Scopus rating (2011): SJR 0.176 SNIP 0.231 ISI indexed (2011): ISI indexed no BFI (2010): BFI-level 1 Scopus rating (2010): SJR 0.235 SNIP 0.386 BFI (2009): BFI-level 1 Scopus rating (2009): SJR 0.243 SNIP 0.393 BFI (2008): BFI-level 1 Scopus rating (2008): SJR 0.197 SNIP 0.212 Scopus rating (2007): SJR 0.143 SNIP 0.126 Web of Science (2007): Indexed yes Scopus rating (2006): SJR 0.118 SNIP 0.102 Original language: EnglishModel verification, HW/SW co-simulation, Customisablecode generation, SW optimizationElectronic versions: 105701-156.pdf Links: http://www.modus-fp7.eu/ Source: dtuSource-ID: u::8813Publication: Research - peer-review › Journal article – Annual report year: 2013 

Methodology and Toolset for Model Verification, Hardware/Software co-simulation, Performance Optimisation and Customisable Source-code generation

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Methodology and Toolset for Model Verification, Hardware/Software co-simulation, Performance Optimisation and Customisable Source-code generation

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