This communication reports a new modeling of opamp-induced harmonic distortion in SC ΣΔ modulators, which is aimed to optimum design of this kind of circuit for high-performance applications. We analyze incomplete transfer of charge in a SC integrator and use power expansion and nonlinear fitting to obtain analytical models to represent harmonic distortion as function of the opamp finite gain-bandwidth (GB), slew-rate (SR) and nonlinear DC gain. Calculated models apply for all modulator architectures where harmonic distortion is dominated by the first integrator in the chain. We show that results provided by the new analytical models fit well to that obtained by simulation in time domain and have accuracy levels much larger than that provided by previously reported modeling approaches

Huertas Díaz, José Luis

Medeiro Hidalgo, Fernando

Pérez Verdú, Belén

Rodríguez Vázquez, Ángel Benito

English

idUS. Depósito de Investigación Universidad de Sevilla

445 Modeling Op Amp-Induced Harmonic Distortion for Switched-Capacitor EA Modulator Design F. Medeiro, B. PCrez-Verdd, A. Rodriguez-Vizquez and J.L. Huertas Dept. de Diseiio de Circuitos Analbgicos. Centro Nacional de Microelectrbnica. Edificio CICA, Avda. Reina Mercedes s/n, 41012-Sevilla (Spain). ABSTRACT This communication reports a new modeling of opamp- induced harmonic distortion in SC CA modulators, which is aimed to optimum design of this kind of circuit for high-per- formance applications. We analyze incomplete transfer of charge in a SC integrator and use power expansion and nonlin- ear fitting to obtain analytical models to represent harmonic distortion as function of the opamp finite gain-bandwidth (GB), slew-rate (SR) and nonlinear DC gain. Calculated mod- els apply for all modulator architectures where harmonic dis- tortion is dominated by the first integrator in the chain [1,2]. We show that results provided by the new analytical models fit well to that obtained by simulation in time domain and have accuracy levels much larger than that provided by previously reported modeling approaches. INTRODUCTION Switched-Capacitor (SC) integrators are basic building blocks for robust monolithic implementation of analog and mixed- mode signal processing and data conversion circuits. In partic- ular, they are widely used to design high-resolution CA modu- lators for voice applications [3]. Also, recent developments extend the useful frequency range of SC XA modulators up to video frequencies 141, thus opening new application fields for forthcoming potential products. Nevertheless, it is amply rec- ognized that increasing either resolution or operation speed of SC CA modulators still remains a difficult design problem, whose solution requires thorough modeling of nonidealities that degrade dynamic range and the concourse of advanced optimization strategies [3, 51. One of the major causes of performance degradation in SC XA modulators is due to incomplete transfer of charge in the SC integrators, a non-ideal effect which is dominated by three major opamp parasitics: (a) finite and nonlinear DC gain, (b) finite gain-bandwidth product (GB) ,  and, (c) slew-rate (SR). This incomplete transfer of charge, which produces gain error and distortion at the integrator output, has been previously analyzed by different authors; for SC filters [6,7], and for SC CA modulators [8, 9, 101. In particular [7] carries out a thor- ough analysis by assuming that feedback is linear and that the integrator input is a sinusoidal input. Unfortunately, his analy- sis does not apply to SC XA modulators, where feedback is highly nonlinear and, consequently, the integrator input can not be considered sinusoidal. Other solution, adopted in [8], is using overspecified analog cells, resulting in large area occu- pation and power consumption, and underexploiting circuit performance potentialities. A recent paper by Dias et al. [9] assumes that error due to incomplete transfer of charge can be considered a white noise contribution which, after integration in the signal band, enables to obtain analytical expressions to evaluate the influence of GB and finite slew-rate. As we dem- onstrate in this paper this again produces overconservative estimations and, hence, precludes full exploitation of the mod- ulator capabilities. Our paper aims to analyze the influence of opamp dynamics (slew-rate and GB) and nonlinear DC gain on the behavior of a SC integrator; and to capture the analysis issues into analyt- ical models suitable to be used for optimum high-level synthe- sis of CA modulators following the approach previously reported by the authors at [5]. Our analysis focuses on the 2nd- order modulator, shown in Fig. 1, and applies to all modulator architectures where distortion is dominated by the first integra- tor in the chain. This defines a class which includes all multi- stage architectures whose first stage is second-order [ 11 -- very important for high-speed applications [2, 41. In particular we will consider the case where feedback coefficients kl and kz in Fig.1 are arbitrary, constrained only by the equation k2 = 2GikI. Figure 1. Second-order XA modulator. SLEW-RATE DISTORSION To cope with the nonlinear feedback that appears in CA mod- ulators, we will assume herein that the integrator input signal consists of the sinusoidal input signal plus a square-wave com- ponent that represents the feedback signal. Slew-rate will 446 appear or not depending upon the instantaneous amplitude of this feedback signal. The approach developed here assumes the effect of the slew-rate in a SC integrator may be interpreted as a nonlinear gain. Let us consider the integrator shown in Fig. 2; during the nth integration interval ($2 in on) the evolu- tion of the output node is, where Vs = vi,, ( n T -  T / 2 )  and 2 is the time constant of the integrator. where, (7) In the first of the cases presented in (6), the effect of the inte- grator time constant translates to a gain error, which will cause increased noise in the signal's band [9]. However, this effect is commonly dominated by the appearance of harmonic distor- tion due to gain dependence of the integrator on its input, as shown in the second case of (6). In the following the approach developed to determine the amplitude of these harmonics is explained. Figure 2. Classical SC integrator. The slope of this curve reaches its maximum value when t = 0, which results, Let us separately consider two cases [9]: 1. The SR of the opamp is higher than the value specified in (2): there is not limitation of the SR and the evolution of vo fits equation (1). 2. The SR is less than (2): in this case the first part of the temporal evolution of vo is linear with slope SR. The version of corresponding to this latter case is: (3) v O ( t )  = v O ( n T - T )  + G i V s +  (SRto-G,Vs)e  where Gi = C/C0 and SRto is the value reached by vo at the time instant where the limitation of SR ends. On the other hand, the slope of the curve in (3) for t = to should be SR; con- sequently, - ( I  - Io) /? to = G , V , / S R - z  (4) with which, (3) becomes, T G , l v r l  -(z -SRz + I )  (5 )  vo (nT) = v ,  (nT- r )  + GiV.7-sgn (V,J SRTe where sgn(.) denotes the sign function, whose value equals unity for positive arguments and -1 otherwise; this sign func- tion, together with the absolute value of V ,  in the exponent, is included to contemplate both the rise and fall slopes.Note that in both cases, (1) and (3, can be described as an integrator with error terms for its gain. These can be calculated using the following expression: It can be shown that for a XA modulator like that in Fig.1, whose first integrator presents the following nonlinear gain: n anuan-,  ; n =  1 ,2 ,3  ... the amplitude of the n-th harmonic at the output is: A,,n = a n A n / ( 2 " - ' k , ) ;  n = 1,2,3,  ... (9) where A is the amplitude of the sinewave input signal of the modulator. In our case, and since the symmetry of (6) annuls the coefficients % y a4, we will assume that the integrator gain can be expressed as: (10) 2 4  g i ( v )  = G i .  (a, + a 3 v  + a , v  ) For a real amplifier, the SR may be different in the rise and fall, however this dissymmetry will always be small in a typical design. Thus, the even harmonics in (9) are negligible respect to the odd ones. In this point, the problem of estimating har- monic distortion consists of searching for the curve with the form shown in (10) which best fits (6) for a specific interval. Considering for a ZA modulator like that presented in Fig. 1, the signal at the input of the first integrator is distributed in the interval (k, VrerA, kl  VrepA),  one solution is to apply the least square method to this range. With this method, the calculation of the coefficients in (10) becomes the solution of the follow- ing system of linear equations: where vR,h  and VR,l represent the upper and lower limits of the interval, respectively, and where it is assumed that VR,, < V ,  < vR,h (note that the validity of the calculation is restricted to the case where VR,h > V,; since, otherwise, the settling will be linear for any output swing and there will be no distortion). For the worst case, 447 where A = k ,  Vrcfand thus VR,[ = 0, the values of a3 and a5 are: where 6 = exp  ( VR, h / V L )  ; VR, 2 V L .  Applying (9), ( I O )  and (13), the amplitudes of the third and fifth harmonics of the modulator output are defined as: (14) A, = Ia , lA3/  ( 4 k l )  ; A, = Iu,IA'/ (16k,) DISTORTION DUE TO THE NONLINEAR GAIN OF THE OPERATIONAL AMPLIFIER Once again, let us consider the integrator in Fig.:! and assume that the gain of the operational amplifier depends on its output, in such a way that: A ,  = A o ( l + P l v o + P 2 V , T )  (15) In this way, the differential equation describing integrator operation is: ( A , + l ) V O , n - ,  + (16) where vi and v,, represent the integrator input and output, respectively. Considering that A, tends to infinity and p1 and p2 tends to zero, (16) can be defined as: AvGiVi, n - I v0,n = AV + 1 + Gi ( 1 + k , )  A,  + I + Gi ( 1 + k , )  '0, n = V o ,  n - I + According to this, analysis of an SC integrator with non linear gain of the operational amplifier, like that in (1 5),  can be made considering an ideal integrator whose input is equal to the expression in parenthesis in (1 7). Thus, we may estimate the distortion as equal to the input of the integrator, analyzing the harmonics of the said expression. For this, we will follow the technique given in [6], briefly repeated here. Let us suppose that the input and output of the integrator can be estimated through their first harmonics; that is: v i =  Visin (wnTs) vo= VOcos (wnTs)  ( 1  8) where o is the input frequency and Ts the sample period. Sub- stituting these expression in (17) and performing a Fourier series expansion of the term in parenthesis, the amplitudes of the second and third harmonics referred to in the first integra- tor are: From here, and taking into equations describing the ideal oper- ation of the second-order modulator, and that in EA modula- tors oT, << I ,  consequently that Vi E 2wTsA cc V ,  = A ( k 2 / k l )  , we obtain the following expressions for the amplitude of the second and third harmonics referred to at the modulator out- put, ILLUSTRATIVE RESULTS The 4th-order two-stage modulator shown in Fig.3 is used in order to evaluate the proposed models. For this, behavioral simulations using the parameters given in Table 1 have been made. Also,jl equals unity; Gi = Gi' and gl has been made to l/(Gi Gi') for maximum cancelation of quantization noise. 1 I Figure 3.  Fourth-order cascaded XA modulator. Input freq. 2.5% Table 1: Parameters used in the simulations. In particular, Fig.4 shows the signal-to-distortion ratio (SIHD) as a function of GB, for SR=25VIps, and includes the simu- lated curve, the one obtained by using the proposed model, and the one which results applying the model in [9]. As it can be seen the model fits well the simulated results, even in those areas where the S/HD curve is nonmonotonic. Fig.5 illustrates results provided by the model of nonlinear gain. In particular, the curves show S/HD as a function of p1 in (20), for &=2.5%, and two different sets of values for the modulator parameters k l ,  k ,  and Ci. As for Fig.4 there is a good fitting to the simu- 448 lated results (please note the granularity of the scale in the ver- tical axis). ....... Calculated /. J’ J’ Previous approacli 84.7 - . /.J’ 74.0 ,-#‘. . . . . . . . . . . .  16.0 12.0 14.0 1 18.0 20.0 21 .O GB :%U) Figure 4. S/HD as a function of opamp GB. . . . . . . . . . . .  -Simulated . A-A Calculated - 122.1 118.3 1 ~~ Nonlinearity (%) Figure 5. S/HD as a function of the gain nonlinearity. Fig.6 is intended to illustrate the use of the proposed models, together with other noise contributions [5], for systematic exploration of the design spaces for multi-stage ZA modulator architectures, in order to find optimum values of parameters kl, k2 and Gi. It represents the signal-to-(noise + distortion) ratio (TSNR) peak as a function of the Gi and k1 (see Fig.3) for a given set of building block specifications. I - 1 .o 0.5 kl Figure 6. TSNR as a function of Gi and kl. This curve has its maximum value at Gi = 0.3 and k ls .45 ,  which are the optimum values for the given block specification set. For that couple of values, both calculated and simulated TSNR are plotted versus the modulator input amplitude in Fig.7. 100.0: -simulated 90.0 ....... -110.0 -90.0 -70.0 -50.0 -30.0 -10.0 Input Level (dBV) Figure 7. TSNR vs. input amplitude. Also, the corresponding curves for the classical choice Gi=0.5 and kl=l.O are shown. Note that the optimized curve reaches a maximum value of lOdB over the classical one which implies a resolution improvement of 1.7bit.s. REFERENCES H. Baher and E. Afifi, “Novel Fourth-Order Sigma-Delta Convertor”, Electonics Letters, 28, 15, July 1992. G.M. Yin, F. Stubbe and W. Sansen, “A 16-b 320-Khz CMOS An> Converter Using Two-Stage Third-Order ZA Noise Shaping”, ZEEE JSSC, 28, pp. 640-647, June 1993. J.C. Candy and G.C. Temes, Oversampling Delta-Sigma Data Converters: Theory, Design and Simulation, IEEE Press, New York 1992. G.M. Yin and W. Sansen, “A High-Frequency and High- Resolution Fourth-Order ZA AID Converter en BICMOS Technology”, Procc. ESSCIRC’93, pp. 1-4, Sep. 1993. F. Medeiro et al., “A Tool for Automated Design of Sigma-Delta Modulators using Statistical Optimization”. Procc ZSCAS’93, pp. 1373-1376, May 1993. K. Lee and R.G. Meyer, “Low Distortion Switched- Capacitor Filter Design Techniques”, ZEEE Journal of Solid-state Circuits, SC-20, pp. 1103-1113, Dec. 1985. W. Sansen et al., “Transient Analysis of Charge Transfer in SC-Filters-Gain Error and Distortion”, ZEEE JSSC, B. E. Boser and B. A. Wooley, “The Design of Sigma- Delta Modulation Analog-to-Digital Converters”, ZEEE JSSC, 23. pp. 1298-1308, Dec. 1988. V. M. F. Dias, “A Design Environment for Switched- Capacitor Noise-Shaping AID Converters”, Ph. D. Dis- sertation, Universita’ Degli Studi di Pavia, 1991. SC-22, pp. 268-276, April 1987. [ 101 F. Op’T Eynde, “High-Performance Analog Interfaces for Digital Signal Processors”, Ph. D. Dissertation, Katho- lieke Universiteit Leuven, 1991. 

Modeling OpAmp-induced harmonic distortion for switched-capacitor ΣΔ modulator design

https://idus.us.es/bitstream/handle/11441/94084/Modeling%20Op%20Amp-Induced%20Harmonic.pdf?sequence=1&isAllowed=y

Modeling OpAmp-induced harmonic distortion for switched-capacitor ΣΔ modulator design

Abstract

Similar works

Full text

Available Versions

idUS. Depósito de Investigación Universidad de Sevilla