Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of analog CMOS chips. These chips can be made to adapt their function through electrical control. The proposed design methodology emphasizes modularity and simplicity at the circuit level -- prerequisites to increasing processor complexity and operation speed. The paper include measurements from a silicon prototype of a fuzzy controller chip in CMOS 1.5μm single-poly technology

Rodríguez Vázquez, Ángel Benito

Vidal Verdú, Fernando

English

idUS. Depósito de Investigación Universidad de Sevilla

122Modular Design of Adaptive Analog CMOS Fuzzy Controller ChipsAngel Rodríguez-Vázquez * and Fernando Vidal ***Dept. of Analog and Mixed-Signal Circuit DesignCentro Nacional de Microelectrónica-Universidad de SevillaEdificio CICA, C/Tarfia s/n, 41012-Sevilla, SPAINFAX:: 34 5 4624506; Phone:: 34 5 3623811email: angel@cnm.us.es**Dto. de Arquitectura y Tecnología de Computadores y ElectrónicaUniversidad de MálagaPza. El Ejido s/n, Málaga, SPAINFAX: 34 5 2131413; Phone: 34 5 2131390email: vidal@tecmal.ctima.uma.esABSTRACT: Analog circuits are natural candidates to design fuzzy chips with opti¬mum speed/power figures for precision up to about 1 %. This paper presents a meth¬odology and circuit blocks to realize fuzzy controllers in the form of analog CMOSchips. These chips can be made to adapt their function through electrical control.The proposed design methodology emphasizes modularity and simplicity at the cir¬cuit level prerequisites to increasing processor complexity and operation speed.The paper include measurements from a silicon prototype of a fuzzy controller chipin CMOS 1.5|Lim single-poly technology.1. INTRODUCTIONFuzzy inference enables predicting the behavior of systems whose mathematical descriptionis unknown, or ill-defined, based on insights about local features of their behavior [1]. Forinstance, to stabilize an inverted pole on a moving cart based on statements such as "if the poleis falling rapidly to the left then the cart must move rapidly to the left", with no need for exactformulation of the dynamics similar to a human operator. Fuzzy technology has also provenviable for incorporation into new products within a short development time and with low devel¬opment cost [2] which, together with its functionality potential, render it very well suited tobuild marketable intelligent systems. In many of these systems, inference can be realized bysoftware on conventional processors; to attain up to lKflip inference speed with 8 to 16 bits ofresolution. However, those requiring either high-speed inference, reduced power consumption,or smaller dimensions have prompted the development of dedicated hardware.Fuzzy inference ASICs can be designed using either digital or analog circuits. Digital pro¬vides larger accuracy, while analog features larger speed efficiency (measured as the powerconsumption and area needed for a given speed) for medium to low accuracy. Consequently,the latter are better suited where major design issues relate to power consumption or systemdimensions, or operation speed, while accuracy remains secondary. This is actually the case inmost applications, where accuracy requirements range from 10% to 1% [3] affordable witheven the cheapest VLSI technologies [4]. Another obvious advantage of analog fuzzy circuitsis their simpler interfacing to physical sensors and actuators, requiring no data converters.Previous approaches to the use of analog circuits for fuzzy controllers did not actuallypresent methodologies for monolithic design, but rather focused on the realization of differentfuzzy subsystems using different technologies [4] [5] [6]. Also, they covered mainly the case123where the input-output function of the controller remainsfixed not appropriate for most prac¬tical applications, where the exact function is unknown a priori or must adapt to specific envi¬ronmental characteristics [2]. This paper presents an architecture for adaptive fuzzy controllersand circuit blocks for their realization in the form of CMOS chips. Major emphasis is placedon full exploitation of the functional features of the MOS transistors and on modularity of thecircuits used for adaptability. This circuit methodology runs parallel to the development ofhardware-compatible learning algorithms that enable the chips to be trained in-situ throughexamples and, thus, compensate second-order hardware non-linearities [7].2. CHIP ARCHITECTUREFuzzy inference is a tool for modeling multidimensional nonlinear systems. For instance, afuzzy washing machine sets the level of water as a function of the clothes' mass, the impurityof water, and the time differential of impurity [2]. This is equivalent to capturing the input-out¬put behavior of the system as a surface response,Ty =/(x) x = {xvx2, ...xM} (1)where y is the output and the vector x the input. Distinctive features of fuzzy inference are:. The surface response, which is a global model of the system behavior, is obtained as a com¬position of functions which capture local features of this behavior.. These local features represent insights about the system operation, and are described throughinference rules of the type,IF xx is An AND x2 is Aa AND ... xM is AiM THEN Consequent Actionwhere Ai} are calledfuzzy labels, and the consequent assign values to y depending on the out¬come of the combination of statements involved in the antecedent clause.. The matching between input variables and fuzzy labels in the statements "if jc; is Atf isgraded continuously from 0 (no matching) to 1 (maximum matching).Since the statements involved in the fuzzy inference rules are in natural language, for instance"if the temperature is low", this technique is very well suited to capture human expertise. Also,the locality of the pieces of knowledge, the basis on which the global surface response is built,enables simpler model updating for changes that affect only limited regions of the input space.Out from the different algorithms reported in literature [1] our approach follows a particu-larization of Takagi-Sugeno's inference where the consequent of each rule is a constant value. a singleton.This is advantageous for hardware implementation and programming [3], andobtains the surface response as a linear combination of weighted normalized basis functions,y =/(x) = X y/*wf*(x) (2)¿= Í.Nwhere each normalized basis function w*(x) corresponds to a fuzzy rule and its weight y* isthe singleton associated to it. This maps onto the parallel chip architecture of Fig. 1(a), whichcontains three layers: input layer, where the non-normalized basis functions w,(x) are evalu¬ated; normalization layer; and output layer, where each normalized function is multiplied bythe singleton associated to it in the corresponding fuzzy rule.Fig. 1(b) shows a more detailed block diagram of the input layer. For each input variable, aset of membership functions s,y(x) are evaluated to obtain the matching degrees among thisinput and the fuzzy labels associated to it. Then the outputs of these membership functions arecombined through minimum operators to obtain the basis functions w,(x).1243. CMOS CIRCUIT BLOCKSOur proposed circuits realizes all the internal operations of Fig. 1 in current mode, to obtainfull advantage of the functional features of MOS transistors and, thus, produce simplest andfastest possible circuits. The inputs are voltages for easier interface to conventional equipment.The v-i interface is realized by the membership function circuitry, which combines this func¬tion with the realization of the membership function itself, through exploitation of the large sig¬nal characteristics of a MOS differential pair. Fig.2(a) shows the basic circuit used formembership functions, where the rectangles represent transistors. Fig.2(b) and (c) show the cir¬cuits for the minimum operator and for normalization, respectively; both with 0(ri) complexityand optimum speed. Since the outputs of the normalization circuit are currents, the operationof singleton weighting is realized directly through current mirrors and the output currentobtained by routing the outputs of all these current mirrors to a common node.The feature of adaptation requires that the shape and location of the membership functions,and the singletons values, are controlled electrically. In our approach this is realized by usingeither of the compound MOS transistors of Fig.3 in the signal path of membership function andsingleton circuits. They feature electrical control of the transconductance with voltage B whilekeeping the circuit function unchanged. Thus, the same circuitry is used for fixed and for adap¬tive chips. The difference is that the latter use simple transistors while the former use compositetransistors. Our studies demonstrate that the range provided by these devices enable to covermost practical applications. On the other hand, the non-linearities observed in the control func¬tion makes not a problem since they are absorbed by the learning mechanism [7].4. EXPERIMENTAL RESULTSFig.4 is a microphotograph of a prototype of a 3-input 4-rule controller which was fabricatedin 1.5|Lim CMOS single-poly technology. Actual circuits in this chip incorporated circuit strat¬egies not displayed explicitly in Figs.2 and 3 to keep the accuracy about 1% (such as cascodetransistors, optimum design for random variations of technological parameters, etc.). Fig.5illustrates the operation of the compound transistors. Measurements correspond to singletoncurrent mirror with the series transistors. The floating control voltage is generated on/chip froman external grounded voltage. Fig.6(a) shows the transfer characteristics measured when thecontroller is used to interpolate a sine wave, and Fig.6(b) shows a bi-dimensional surface mapmeasured for a particular setting of the singleton values. Operation speed of the prototype isabout 5MFlips with ±2.5v and 15|iA tail current.References[1] R.R. Yager and L.A. Zadeh: "An Introduction to Fuzzy Logic Applications in Intelligent Systems". KluwerAcademic Pub. 1992.[2] H. Takagi: "Applications of Neural Networks and Fuzzy Logic to Consumer Products", pp. 8-12 in FuzzyLogic Technologies and Applications, New-York: IEEE Press 1994.[3] T. Yamakawa: "A Fuzzy Inference Engine in Nonlinear Analog Mode and Its Application to a Fuzzy LogicControl". IEEE Trans, on Neural Networks, Vol. 4, pp. 496-522, May 1993.[4] M.J.M. Pelgrom et al.: "Matching Properties ofMOS Transistors". IEEE Journal of Solid-State Circuits, Vol.39, pp. 1433-1440, June 1990.[5] T. Miki etal.: "Silicon Implementation for a Novel High-Speed Fuzzy Inference Engine: MegaFLIPs AnalogFuzzy Processors". Journal ofIntelligent and Fuzzy Systems, Vol. 1, pp. 21-Al, 1993.[6] J.W. Fattaruso et al.: "A Fuzzy Logic Inference Processor". IEEE Journal of Solid-State Circuits, Vol. 29,pp. 397-402, April 1994.[7] F. Vidal and A. Rodríguez-Vázquez: "Learning under Hardware Restrcitions in CMOS Fuzzy Controllersable to Extract Rules from Examples". Proc. ofVI Congress ofthe Int. Fuzzy Systems Association, July 1995.125í min.VI min.J- w,(x)wN(x)Input layer NormalizationFigure 1(a)Output layer XMFigure 1(b)X\.-1 Jll H ^21 I »"I SN]~M}-ij2M IIu+I«t'l. «2+ti _|tí2..2/.Figure 2(a)*-4U- ?htMjrcMh,-,+/BFigure 2(b)r*- ^/oWi'+IqS wi'+los' p-mirror >V+WG1 W,',+Iqs^ vvw+/ospHFigure 2(c)Figure 3""fro-.OOOOlFigure 5UN 1.000/div (UA) 10.00y, ¿lamps /1.780Figure 6(a) je,, namps.neoAiiv tv) ooo2x2, voltsFigure 6(b)

Modular Design of Adaptive Analog CMOS Fuzzy Controller Chips

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Modular Design of Adaptive Analog CMOS Fuzzy Controller Chips

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