In this paper a reconfigurable implantable low noise amplifier for the recording of neural signals is presented. It is comprised by low-power and noise efficient current reuse OTAs in its direct path. The proposed architecture allows for an active feedback to set the high-pass corner in place of the commonly used pseudoresistor. Bandwidth selectivity is achieved by circuit reconfigurability which changes the pole frequencies of the system without impacting the total power consumption. Simulation results in AMS 0.18μm technology validate the proposed architecture in both nominal and corner process conditions with an estimated total power consumption of 454nW.Office of Naval Research (USA) N00014-14-1-0355Junta de Andalucía TIC 233

Delgado Restituto, Manuel

Rodríguez Vázquez, Ángel Benito

Valtierra, José Luis

English

idUS. Depósito de Investigación Universidad de Sevilla

A 4-Mode Reconfigurable Low Noise Amplifier forImplantable Neural Recording ChannelsJose´ Luis Valtierra, A´ngel Rodrı´guez-Va´zquez and Manuel Delgado-RestitutoInstitute of Microelectronics of Seville and University of SevillaAvda. Americo Vespucio s/n, 41092-Seville,SPAINEmail: {valtierra,angel,mandel}@imse-cnm.csic.esAbstract—In this paper a reconfigurable implantable low noiseamplifier for the recording of neural signals is presented. Itis comprised by low-power and noise efficient current reuseOTAs in its direct path. The proposed architecture allows foran active feedback to set the high-pass corner in place of thecommonly used pseudoresistor. Bandwidth selectivity is achievedby cicuit reconfigurability which changes the pole frequencies ofthe system without impacting the total power consumption. Sim-ulation results in AMS 0.18µm technology validate the proposedarchitecture in both nominal and corner process conditions withan estimated total power consumption of 454nW .Index Terms—low noise amplifier, neural recording, low powercircuit, reconfigurable amplifierI. INTRODUCTIONIt is possible to sense two types of signals within the surfaceof the cerebral cortex: local field potential (LFP) and actionpotential (AP). The LFP has an amplitude of (10µ-1m)Vin the (1 − 500)Hz band while the AP has an amplitudeof (10µ − 1m)V in the (250 − 7k)Hz band. Furthermore,the hippocampus of an epileptic brain exhibits an oscillationknown as fast ripple (FR) in the (250 − 600)Hz band withan amplitude of (30µ − 1.5m)V . Neuroscience research hasproven and suggested that these signals are useful in severalapplications such as epileptic seizure predictors [1], generalepilepsy studies [2] as well as prosthetic limb control [3] andspeech decoding [4].The acquisition of these neural signals by a reconfigurableanalog front-end (AFE) is a problem that has recently gen-erated great interest [5],[6],[7],[8]. A channel of this kindfeatures bandwidth selectivity capabilities in order to observethe neural signals separately or simultaneously. In general, theAFE has to be able to achieve the following:• Operate at low power due to very limited budget and toavoid the possibility of tissue damage caused by excessiveheating [9].• The input referred noise of the amplifier has to bekept below the background noise (< 5µV rms) of therecording site.• The tissue-electrode interface produces DC nonidealitiessuch as offsets and drifts that must be filtered out in orderto avoid amplifier saturation.CICFCLOTA1OTA3OTA2CBL2CBR2CBL1CBR1ΦΦθθΦΦθθFig. 1. Reconfigurable Low Noise AmplifierThe low noise amplifier (LNA) is the most fundamentalblock in a reconfigurable AFE since it determines the thermalnoise floor as well as most of the power consumption in thesystem. Additionally, it has to be able to perform adequatelyfor all operational bandwidths. Therefore, the challenge posedby the design of the LNA is evident.With few exceptions, most LNAs are based on the circuitintroduced in [10]. These amplifiers set a high-pass polewith a pseudoresistor and a feedback capacitor. Althoughthis solution is successful in proof-of-concept scenarios, thenominal value of pseudoresistors shows high variability, whichcomplicates bandwidth tuning [11]. On the other hand, mostLNAs either focus only on a specific neural signal type orrequire subsequent specialized filters stages in order to achievebandwidth selectivity.In this paper, the concept of a reconfigurable LNA ispresented. It features an active feedback to set the high-pass pole in place of the pseudoresistor as well as circuitreconfigurability which enables to select different neural signalbandwidths. The paper is organized as follows. Section IIpresents the mathematical models of the circuit for all modesof operation. Section III shows the low-power design consider-ations and procedure. Section IV depicts the simulation results,conclusions are given in Section V.978-1-5090-0493-5/16/$31.00 c©2016 European UnionFig. 2. a) Current reuse OTA b) Simple programmable OTATABLE IMODES OF OPERATION FOR THE RECONFIGURABLE AMPLIFIERφ θ Mode of operation0 0 Fast Ripple0 1 Action Potential1 0 Local Field Potential1 1 Full BandwidthII. RECONFIGURABLE AMPLIFIERFig. 1 shows the reconfigurable neural amplifier architec-ture. Its topological structure and the value of the capacitorbank CB change according to control signals φ and θ. Theamplifier features capacitive coupled inputs and is comprisedof two cascaded current reuse OTAs as shown in Fig. 2(a).These OTAs generate the transconductance of a complemen-tary input pair from half the current as they are biased by thesame source. OTA3 performs a reconfigurable active feedbackfrom the output of either OTA1 or OTA2. A simple differentialprogrammable OTA as depicted in Fig. 2(b) is used since thisstructure is able to produce extremely low transconductance.Regardless of the mode of operation, the mid-band gain ofthe amplifier is given by the input and feedback capacitors asfollows:GainMidband ' CICF. (1)Small signal analysis shows that the transfer function forall modes of operation contains factors β = −CF gm1 +CIgm2−CF gm2−Cp1gm2 and α = CICFCB+CICFCp2+CICBCp2−CICBCp3−CICp2Cp3 +CICBCL +CICp2CL.Where Cp1, Cp2, Cp3 and gm1, gm2, gm3 are the parasiticinput capacitance and transconductance of each OTA, respec-tively.Four modes of operation are accomplished by changing thefrequency of the three dominant poles in the system, whichin turn is done by a combination of reconfigurable feedbackand picoampere bias of OTA3 as well as programmabilityin the capacitor bank. This scheme is unlike most front-endamplifiers hitherto reported since generally, bandwidth tuningis achieved by changing the main bias current which translatesas a non-constant power consumption: an undesirable featurein an implanted device. The modes of operation for theproposed reconfigurable neural amplifier are defined in TableI and are carefully examined in the following subsections.A. Full Bandwidth ModeWhen φ = 1 and θ = 1 the circuit enters the fullbandwidth (FB) mode, which covers both the local field andaction potential frequency bands. Fig. 3(a) shows a simplifieddiagram of this mode. Assuming 5 ·CB1 < CL, the first poleisHPpole(1)FB ' gm3CFA2, (2)where A2 = gm2/gds2. A pair of complex conjugate polessets the low-pass −40dB/decade roll-off as follows:LPpole(2,3)FB ' −CB1β ±√∆FB2α. (3)Where ∆FB = C2B1β2 − 4αCF gm1gm2.B. Local Field Potential ModeThe LFP mode of operation is accessed when φ = 1 andθ = 0 and is as depicted in Fig. 3(b). The high-pass pole isthe same as the FB mode. The low-pass pole is given by onepole only and its frequency is reduced since CB2 > 10 · CB1and CB2 > CL. Therefore, the second and third poles splitand are defined asLPpoleLFP = Pole(2)LFP ' CF gm1gm2CB2β, (4)Pole(3)LFP ' CB2βα. (5)As a consequence, the frequency response of the LFP modeexhibits a −20dB/decade roll-off.C. Action Potential ModeFig. 3(c) shows the AP mode. A topological change iscompleted when φ = 0 and θ = 1 meaning that OTA3 nowfeedbacks from the output of OTA2. This has the followingeffect on the high-pass pole,HPpole(1)AP ' gm3CF. (6)Eq. (6) shows that by removing A2 the high-pass pole movesto a higher frequency. An even higher frequency is achievedif IB3Y > IB3X is considered. The second and third polesare described by Equation 3 as well since CB1 is set as thefeedback capacitor.D. Fast Ripple ModeThe amplifier enters FR mode as depicted in Fig. 3(d) whenφ = 0 and θ = 0. The bandwidth is set by a combination of theAP high-pass pole and LFP low-pass pole. The high-pass poleis thus described by Equation 6 (considering IB3Y > IB3X aswell) while Equations 4 and 5 describe the second and thirdpoles of the FR mode transfer function.CICFCLCB1OTA1OTA2OTA3CICFCLCB1OTA1OTA2OTA3CICFCLOTA1OTA2OTA3(a)(c)(b)(d)CICFCLCB2OTA1OTA2OTA3CB2Fig. 3. Reconfigurable Modes. a) Full bandwidth mode b) Local field potentialmode c) Action potential mode d) Fast ripple modeIII. CIRCUIT DESIGNIn order to obtain maximum transconductance efficiency,the differential pairs of amplifiers in low-power circuits arenormally biased in the weak inversion region. The trancon-ductance of OTA1 and OTA2 in weak inversion isgm(1,2) =IB(1,2)nV t(7)where n is the sub-threshold slope and V t is the thermalvoltage. In the case of OTA3, the transconductance is givenbygm3 =IB32nV t. (8)Noise is a critical concern in the design of low-powercircuits. In this amplifier, the main noise generator is thedifferential pair of OTA1. Achieving minimal contribution of1/f noise is possible once large transistor areas are used,however, thermal noise is unavoidable. The input referrednoise of the amplifier can be approximated as followsV ni2rms '4kTγnV tIB1∆f , (9)where γ = 1/2 in weak inversion and ∆f is the bandwidthof the amplifier, which is approximated to the value of thelow-pass corner. In the proposed amplifier, CB is the dominantterm in the bandwidth for every operation mode. This featureallows to set up ∆f and V ni2rms relatively independently. Thishas to be done with caution so as not to lead to instability.Taking into account the previous remarks, the design startsby biasing OTA1 in weak inversion with a thermal noisefloor of ∼ 50nV/√Hz in the FB mode while ensuringlarge differential pair area to combat 1/f noise. Adequatenoise performance is obtained for the rest of the modes ofoperation by setting up the noise in this mode. Total powerconsumption is kept low by biasing OTA2 in weak inversionwith the minimal possible current while maintaining stabilityand high enough gain. OTA3 is biased with an extremely small100 102 1041020304050Frequency (Hz)Gain (dB)Fig. 4. Frequency Response for Reconfigurable Modes. FB in green, LFP inred, FR in Yellow, AP in Blue.picoampere current so as to keep a < 1Hz high-pass pole inthe FB and LFP modes. This current is barely increased forthe AP and FR modes to the point that its impact on the totalpower consumption is still negligible. Capacitor bank CB issized according to the bandwidth targets for each mode.IV. SIMULATION RESULTSThe circuit was simulated in Cadence-Spectre consideringa behavioral common-mode feedback block and the AMS0.18µm process. Bias voltage was set to 1V , CI/CF =40pF/155fF and CL = 4.6pF . Fig. 4 shows the frequencyresponse for each of the reconfigurable modes. The predictedbehavior from the mathematical models in the previous sectionis hereby verified. However, a slight difference in the estimatedlow-pass corner between the AP and FB modes is seen. Thisdifference is probably due to the input parasitic capacitanceof OTA3 which is added to the output node in the AP mode.Fig. 5 shows the total harmonic distortion for the four modes.It can be seen that at 1mV the circuit in all modes shows a< 1% distortion, which validates the input swing capabilitiesof the proposed circuit.Process variations simulation show a low-pass corner fre-quency spread of ∆fLP = ±2.5kHz for FB and AP modesand ∆fLP = ±200Hz for the LFP and FR modes. Fig.6(a) shows how a 3-bit CB ∈ [247fF, 1.23pF ] is able tocompensate the low-pass corner variations for the FB and APmodes. The low-pass corner variations for the LFP and FRmodes can be compensated by a 3-bit CB ∈ [7.1pF, 15.1pF ]as shown in Fig. 6(b). In a similar fashion, the high-pass cornercan be tuned by changing IB3 as seen in Fig. 7. Table II furtherdissects the performance of the simulated circuit. All modesmaintain an adequate noise performance while keeping thesame power consumption. No comparison with the state ofthe art is made since we believe simulation results shouldn’tbe compared with experimentally verified work.V. CONCLUSIONSA new reconfigurable LNA for neural recording was intro-duced and verified through simulations. The LNA is capableof switching between four modes of operation that cover themost relevant neural signal bandwidths without impacting thetotal power consumption. The circuit characteristics are ideal0.5 1 1.5 2x 10−300.511.522.53Vpp (mV)THD (%)Fig. 5. Total Harmonic Distortion for Reconfigurable Modes. FB in green,LFP in red, FR in Yellow, AP in Blue.TABLE IISIMULATION RESULTS FOR RECONFIGURABLE MODESFB LFP AP FRGain (dB) 48 48 48 48Power (nW ) 454 454 454 454High Pass (Hz) 0.129 0.129 224 224Low Pass (Hz) 7k 590 6.8K 590Integrated Input Noise 5.76 4.2 4.1 1.24(µV rms) (1-7k)Hz (1-590)Hz (224-6.8k)Hz (224-590)HzTHD (%) 0.5@1mVpp 0.37@1mVpp 0.5@1mVpp 0.47@1mVpp1kHz 100Hz 1kHz 400HzCB (pF) 0.68 9.1 0.68 9.1NEF 1.79 4.5 1.31 1.68for the first stage in a neural recording channel. The simulatedpower consumption suggests that the eventually fabricated chipwill be the lowest power consuming circuit of its kind. Adesign in a smaller channel length process might be able tofurther reduce the power consumption of the circuit since thethreshold voltage of the transistors is smaller.ACKNOWLEDGEMENTSThis work has been funded by the Office of Naval Re-search (ONR-USA) under Project N00014-14-1-0355 and10−2 100 102 104304050Frequency (Hz) (b)Gain (dB)10−2 100 102 1042040Frequency (Hz) (a)Gain (dB)Fig. 6. Low-pass corner tuning a) FB mode, valid also for AP b) LFP mode,valid also for FR.10−2 100 102 10420304050Frequency (Hz) (a)Gain (dB)100 102 1041020304050Frequency (Hz) (b)Gain (dB)Fig. 7. High-pass corner tuning a) FB mode, valid also for LFP b) AP mode,valid also for FR.Junta de Andalucia, Proyectos Excelencia-Conv.2012 underProject TIC 2338. The first author acknowledges the supportof CONACyT-Mexico.REFERENCES[1] M. D’Alessandro, R. Esteller, G. Vachtsevanos, A. Hinson, J. Echauz,and B. Litt, “Epileptic seizure prediction using hybrid feature selectionover multiple intracranial eeg electrode contacts: a report of fourpatients,” Biomedical Engineering, IEEE Transactions on, vol. 50, no. 5,pp. 603–615, 2003.[2] A. Bragin, I. Mody, C. L. Wilson, and J. Engel, “Local generation offast ripples in epileptic brain,” The Journal of neuroscience, vol. 22,no. 5, pp. 2012–2021, 2002.[3] P. Shenoy, K. J. Miller, J. G. Ojemann, and R. P. Rao, “Generalizedfeatures for electrocorticographic bcis,” Biomedical Engineering, IEEETransactions on, vol. 55, no. 1, pp. 273–280, 2008.[4] S. Kellis, K. Miller, K. Thomson, R. Brown, P. House, and B. Greger,“Decoding spoken words using local field potentials recorded from thecortical surface,” Journal of neural engineering, vol. 7, no. 5, p. 056007,2010.[5] T.-Y. Wang, M.-R. Lai, C. M. Twigg, and S.-Y. Peng, “A fully reconfig-urable low-noise biopotential sensing amplifier with 1.96 noise efficiencyfactor,” Biomedical Circuits and Systems, IEEE Transactions on, vol. 8,no. 3, pp. 411–422, 2014.[6] X. Zou, L. Liu, J. H. Cheong, L. Yao, P. Li, M.-Y. Cheng, W. L. Goh,R. Rajkumar, G. S. Dawe, K.-W. Cheng et al., “A 100-channel 1-mwimplantable neural recording ic,” Circuits and Systems I: Regular Papers,IEEE Transactions on, vol. 60, no. 10, pp. 2584–2596, 2013.[7] J. J. Wheeler, K. Baldwin, A. Kindle, D. Guyon, B. Nugent, C. Segura,J. Rodriguez, A. Czarnecki, H. J. Dispirito, J. Lachapelle et al., “Animplantable 64-channel neural interface with reconfigurable recordingand stimulation,” in Engineering in Medicine and Biology Society(EMBC), 2015 37th Annual International Conference of the IEEE.IEEE, 2015, pp. 7837–7840.[8] M. Kuhl and Y. Manoli, “A 0.01 mm 2 fully-differential 2-stage am-plifier with reference-free cmfb using an architecture-switching-schemefor bandwidth variation,” in European Solid-State Circuits Conference(ESSCIRC), ESSCIRC 2015-41st. IEEE, 2015, pp. 287–290.[9] J. C. Lamanna, K. A. Mccracken, M. Patil, and O. J. Prohaska,“Stimulus-activated changes in brain tissue temperature in the anes-thetized rat,” Metabolic brain disease, vol. 4, no. 4, pp. 225–237, 1989.[10] R. R. Harrison and C. Charles, “A low-power low-noise cmos amplifierfor neural recording applications,” Solid-State Circuits, IEEE Journal of,vol. 38, no. 6, pp. 958–965, 2003.[11] T. Jochum, T. Denison, and P. Wolf, “Integrated circuit amplifiers formulti-electrode intracortical recording,” Journal of neural engineering,vol. 6, no. 1, p. 012001, 2009.

A 4-mode reconfigurable low noise amplifier for implantable neural recording channels

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A 4-mode reconfigurable low noise amplifier for implantable neural recording channels

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idUS. Depósito de Investigación Universidad de Sevilla