The attention is focused on the Windows operating system (OS) used as a control and measurementenvironment. Windows OS due to extensions becomes a real-time OS (RTOS).Benefits and drawbacks of typical software extensions are compared. As far as hardwaresolutions are concerned the field programmable gate arrays FPGA technology is proposed toensure fast time-critical operations. FPGA-based parallel execution and hardware implementationof the data processing algorithms significantly outperform the classical microprocessoroperating modes. Suitability of the RTOS for a particular application and FPGA hardwaremaintenance is studied

Kołek, Krzysztof

Turnau, Andrzej

AGH (Akademia Górniczo-Hutnicza) University of Science and Technology: Journals

Krzysztof Kołek∗, Andrzej Turnau∗FPGA AS A PART OF MS WINDOWS CONTROLENVIRONMENTThe attention is focused on the Windows operating system (OS) used as a control and mea-surement environment. Windows OS due to extensions becomes a real-time OS (RTOS).Beneﬁts and drawbacks of typical software extensions are compared. As far as hardwaresolutions are concerned the ﬁeld programmable gate arrays FPGA technology is proposed toensure fast time-critical operations. FPGA-based parallel execution and hardware implemen-tation of the data processing algorithms signiﬁcantly outperform the classical microprocessoroperating modes. Suitability of the RTOS for a particular application and FPGA hardwaremaintenance is studied.Keywords: MSWindows extensions, soft real time operating system, FPGA-based controllerFPGA JAKO CZĘŚĆ ŚRODOWISKA STEROWANIA MS WINDOWSUwagę skupiono na Windows – systemie operacyjnym (OS) użytym jako środowisko po-miarów i sterowania. Windows OS, dzięki rozszerzeniom, staje się systemem operacyjnymczasu rzeczywistego (RTOS). Porównano wady i zalety typowych programowych rozszerzeń.W przypadku sprzętowych rozwiązań, proponuje się użycie technologii FPGA, by wykonaćszybkie, krytyczne czasowo operacje. Równoległe wykonanie algorytmu oparte na technologiiFPGA i sprzętowa implementacja algorytmów przetwarzania danych w sposób znaczący prze-wyższają klasyczne mikroprocesorowe tryby pracy. Badane są: dostosowanie oraz użytecznośćRTOS dla wybranych aplikacji i rozwiązania sprzętowe wykorzystujące technologię FPGA.Słowa kluczowe: rozszerzenie MS Windows, miękkie systemy operacyjne czasu rzeczywis-tego, sterowniki oparte na technologii FPGA1. IntroductionMS Windows is widely used operating system. A great number of users insist toapply MS Windows in real-time control applications. In many cases the systemswork satisfactory, however they may not meet the safety time-critical requirements.If these requirements are realised in a programming manner (under an operatingsystem) then the shortest critical times are deﬁned to be a few or tens microsecondsusually. Due to the reconﬁgured FPGA chips we can reduce these times to a few ortens nanoseconds.∗Department of Automatics, Faculty of Electrical Engineering, Automatics, Computer Scienceand Electronics, AGH University of Science and Technology, Kraków, Poland, kko@agh.edu.pl,atu@agh.edu.plComputer Science • Vol. 8 Special Edition • 2007612. MS WINDOWS and its extensionsAs far as a real-time operation is concerned threeWindows environments are testedand compared. In fact, one would rather call it ”a soft real-time” [4]. The followingWindow applications are examined:• excited by Windows timer message (WM Timer),• excited by multimedia event timer,• Real-Time Windows Target (RTWT).To perform the tests we need a time reference for the measurements. Softwaretimers are not accurate they introduce unpredictable overhead to the measurements.Fortunately, we can use the 40 MHz clock available at the RT-DAC4/PCI board [2].To measure the accuracy of the timer events the periodic tasks are started in eachinvestigated environments. The only goal of these tasks is read the 40 MHz timer. Thetimer values serve as the time stamps and allow to estimate the jitter of the periodictask.The ﬁrst experiments related toWindows timer message have been tested. Theperiods of the timer is set to 100 ms or 10 ms. For both experiments the severalindividual tasks were running concurrently. It means that during the experiments MSWindows was heavy loaded.The results in the form of histograms are shown in Figure 1.a) b)100 150 200 250 300 350 40001002003004005006007000 50 100 150 200 250 3000100200300400500600700800900Fig. 1. Windows application excited by WM Timer: a) 100ms-samplingperiod; b) 10ms-sampling periodThere are two mean values: 109.9601 ms and 15.7571ms. These values are faraway from the desired values: 100ms and 10ms. Such an operation is not acceptablefor the control purpose. It shows that the time taken for the system to switch froma given task to the task triggered by the timer message is signiﬁcantly large and doesnot satisfy measurement and control requirements in the case when the sampling timeis below tens of milliseconds.The next experiments correspond to the Windows application excited by mul-timedia event timer. For example, this method is used by Real-time connection62 Krzysztof Kołek, Andrzej Turnau(RT-CON). The graphical results of two similar experiments of the sampling peri-od equal to 10ms are shown below (see Fig. 2).a) b)0 5 10 15 20 25 300100020003000400050006000700080000 5 10 15 20 25 30010002000300040005000600070008000Fig. 2.Windows application excited by multimedia event timer; similar experiments:a) and b) 10ms-sampling periodThe mean values are correct but a large jitter happens occasionally (even 25 ns).The ﬁnal experiments correspond toWindows extended to RTWT. The graph-ical results of two experiments excited by the sampling periods equal to 10ms and1ms are given below (see Fig. 3).a) b)9.98 9.985 9.99 9.995 10 10.005 10.01 10.015010020030040050060070080090010000.975 0.98 0.985 0.99 0.995 1 1.005 1.01 1.015 1.02 1.0250200400600800100012001400160018002000Fig. 3. Windows application extended to RTWT: a) 10ms-sampling period;b) 1ms-sampling periodThe mean values are correct. We observe a small jitter. This solution worksperfectly except that it does not support majority of the Windows API functions.For example, USB protocol.The beneﬁts and drawbacks of the presented experiments are summarized inTable 1. One can notice that it is hard to ﬁnd an ideal omnipotent solution. In thetwo ﬁrst cases to access I/O memory space one needs to apply a dedicated driver. InFPGA as a part of MS WINDOWS control environment 63the RTWT case which seems to be the most suitable tool almost all the WindowsAPI functions are not supported.We can create add-on functionality via extensions to MS Windows which mayimprove to a large extent responsiveness of originalWindows. The primary goal is tominimize pre-emptive and interrupt latency. Unfortunately Microsoft kernels do notprovide deterministic response.Table 1Beneﬁts and drawbacks of the presented MS Windows environmentsBeneﬁts DrawbacksThe Windowsapplicationexcited byWindows timermessageWM TimerEach Windows are supportedby the MFC library. Allfunctions from the Windowsapplication programmerinterface (API) operatesproperlyThe average jitter is acceptable.I/O memory space is availabledue to drivers onlyThe Windowsapplicationexcited bymultimedia eventtimerThe average jitter is acceptable.Nearly all functions fromWindows API operatesproperly For example, supportfor USBA large jitter happensoccasionally. I/O memory spaceis available due to dedicatedI/O drivers onlyReal-TimeWindowsTarget RTWTSmall jitter. Very good timestabilityAlmost every function fromWindows API is notsupported. I/O memory space isavailable3. FPGA based time-critical operationsThe Field Programmable Gate Arrays (FPGA) contain a matrix of cells ready to beconﬁgured by a user to satisfy a desired utility goal. The capacity of the FPGA chipsis high enough to implement user-designed processors. As far as the data processingvelocities are compared the FPGA-based parallel execution and hardware implemen-tation of the data processing algorithms signiﬁcantly outperform the classical micro-processor operating modes. High speed is achieved due to advanced technology andthrough improved architecture, and supports system clock high rates (in our design40 MHz). One has to remember that safety in control environment depends on a timedelay that the system responds to a critical event. In a FPGA-based system it means25 ns or less (in a case of a higher than 40 MHz clock rate). If a PC-based systemis concerned the time delay is a few s. FPGA is hundreds or thousands times fasterdue to its parallel operation and due to the fact that the processing algorithms areimplemented in hardware. Nevertheless high speed, it is hard to predict a worst-caseguaranteed performance because delays in FPGA logic cells are layout dependent.64 Krzysztof Kołek, Andrzej TurnauCritical part of a design are shift registers and counters. They should run faster ap-proximately two thirds of the speciﬁed toggle rate.Fig. 4. Block diagram of the RT-DAC4/PCI board (courtesy Inteco Ltd)One can use a vast number of complex and advanced computer boards equippedwith FPGA. We focus our attention to RT-DAC4/PCI board (see Fig. 4) whichinclude two main elements: the PLX9030 PCI bridge and the FPGA chip [3]. Thebridge is the local data bus master responsible for data transfer between the PCI andlocal bus. The local data bus is connected to the FPGA chip. Each analog and digitalI/O function of the board must be implemented as a logic part of the FPGA chip. Bythe computer applications the RT-DAC4/PCI board is visible as a 64 double wordslocated in the I/O address space. An extra 64 double words I/O space is accessible ifinterrupts are considered. The access to the board resources is done by the inp, inpwand inpd or outp, outpw and outpd C-language instructions.FPGA as a part of MS WINDOWS control environment 65The board can run at synchronous system clock rates of 40MHz applied to syn-chronize user-designed logic. The clock signal (40 MHz) born at the board and con-nected to the FPGA chip generates the local bus clock signal which is asynchronousto the PCI bus clock and is independent to the PC microprocessor clock. It meansthat FPGA works autonomously. Even the reset signal to the PC does not aﬀect theFPGA operations. These features create a temptation to use an FPGA chip to beapplied as safety time-critical device.To illustrate safety time-critical operations realized by an FPGA circuit the con-trol of the 3D Crane laboratory system is examined (see Fig. 5). The system can beused to develop even time-optimal control algorithms [5]. The real-time and free ofdelays operation is guaranteed due to functionality embedded in the FPGA logic.Fig. 5. Conﬁguration of the 3D Crane measurement, control and safety systemThere are several critical constrains related to the crane construction and control.It is strictly forbidden to go beyond the 3D Crane system ranges. The bridge and thecart of the crane must remain inside their working space. The temperature and supplyvoltage of the power ampliﬁer are permanently monitored and supervised. A violationof an arbitrary constraint rule has to result in a fast (without a delay) reaction ofthe system. These safety functionality is inserted (conﬁgured) directly in FPGA. It isguaranteed that the system responds to a violation of rules within 25 nanoseconds.Beside the critical safety rules the FPGA system is conﬁgured to become the interfaceto sensors (encoders) and actuators (the PWM generators applied to control the DCmotors).The controllers are build in Simulink equipped with the RTWT toolbox. Thesecontroller generate controls and deﬁne parameters responsible for safety. In this wayone does not need to worry about control safety. Automatic (triggered) behaviors willtake place free of delays of the operating systems. The System on the Chip (SoC)66 Krzysztof Kołek, Andrzej Turnauconﬁguration shown in Figure 6 is an extended version of the conﬁguration shown inFigure 5. The SoC approach characterizes reach functionality – it means that multiplesystem components are placed on a single silicon chip [1]. The FPGA circuits containresources suﬃcient to implement microprocessors, operational memory, interfaces tomeasurement and control signals, interfaces to communication channels, signal pro-cessing blocks, etc. One can decompose tasks and implement them as programmes ofmicroprocessors or dedicated logic blocks. In peculiar, we can deﬁne the componentsresponsible for time-critical safety operations.The main beneﬁt of FPGA is its reconﬁguration ﬂexibility. It might happens thaturgent modiﬁcations to a logic are required. In this case we can introduce them ina very fast and relatively simple way. The modiﬁcations do not interfere in hardware!Despite that this new implemented functionality is realised by the FPGA hardware.Fig. 6. System on the Chip conﬁguration4. SummaryMSWindows due to extensions becomes a real-time OS (RTOS). One has to remem-ber that MS Windows equipped with extensions can manage to control simple lab-oratory devices in real-time. However, it is not recommended to apply MSWindowsin time-critical industrial processes. In fact, to ensure safety time-critical operationFPGA as a part of MS WINDOWS control environment 67the FPGA logic is proposed. A microprocessor conﬁgured in this logic responds totime-critical events independently to the MSWindows operation.References[1] Kołek K.: FPGA as a Part of Control System. 14th International Conference onProcess Control ’03, Strbske Pleso, Slovak Republic, June 8–11, 2003, p. 207, CD[2] RT-DAC4/PCI Board. Users Guide, http://www.inteco.com.pl[3] Spartan-II 2.5V FPGA Family: Functional description. http://www.xilinx.com[4] Timmerman M.: Windows NT Real-Time Extensions better or worse? Real-TimeMagazin 98–3, pp. 11–19, 1998[5] Pauluk M., Korytowski A., Turnau A., Szymkat M.: Time optimal control of3d crane. Proc. VII IEEE Int. Conf. “Methods and Models in Automation andRobotics”, Międzyzdroje, August 28–31 2001, pp. 927–93268 Krzysztof Kołek, Andrzej Turnau

FPGA AS A PART OF MS WINDOWS CONTROL ENVIRONMENT

Computer Science Journal (AGH University of Science and Technology, Krakow)

Krzysztof Kołek∗, Andrzej Turnau∗FPGA AS A PART OF MS WINDOWS CONTROLENVIRONMENTThe attention is focused on the Windows operating system (OS) used as a control and mea-surement environment. Windows OS due to extensions becomes a real-time OS (RTOS).Benefits and drawbacks of typical software extensions are compared. As far as hardwaresolutions are concerned the field programmable gate arrays FPGA technology is proposed toensure fast time-critical operations. FPGA-based parallel execution and hardware implemen-tation of the data processing algorithms significantly outperform the classical microprocessoroperating modes. Suitability of the RTOS for a particular application and FPGA hardwaremaintenance is studied.Keywords: MSWindows extensions, soft real time operating system, FPGA-based controllerFPGA JAKO CZĘŚĆ ŚRODOWISKA STEROWANIA MS WINDOWSUwagę skupiono na Windows – systemie operacyjnym (OS) użytym jako środowisko po-miarów i sterowania. Windows OS, dzięki rozszerzeniom, staje się systemem operacyjnymczasu rzeczywistego (RTOS). Porównano wady i zalety typowych programowych rozszerzeń.W przypadku sprzętowych rozwiązań, proponuje się użycie technologii FPGA, by wykonaćszybkie, krytyczne czasowo operacje. Równoległe wykonanie algorytmu oparte na technologiiFPGA i sprzętowa implementacja algorytmów przetwarzania danych w sposób znaczący prze-wyższają klasyczne mikroprocesorowe tryby pracy. Badane są: dostosowanie oraz użytecznośćRTOS dla wybranych aplikacji i rozwiązania sprzętowe wykorzystujące technologię FPGA.Słowa kluczowe: rozszerzenie MS Windows, miękkie systemy operacyjne czasu rzeczywis-tego, sterowniki oparte na technologii FPGA1. IntroductionMS Windows is widely used operating system. A great number of users insist toapply MS Windows in real-time control applications. In many cases the systemswork satisfactory, however they may not meet the safety time-critical requirements.If these requirements are realised in a programming manner (under an operatingsystem) then the shortest critical times are defined to be a few or tens microsecondsusually. Due to the reconfigured FPGA chips we can reduce these times to a few ortens nanoseconds.∗Department of Automatics, Faculty of Electrical Engineering, Automatics, Computer Scienceand Electronics, AGH University of Science and Technology, Kraków, Poland, kko@agh.edu.pl,atu@agh.edu.plComputer Science • Vol. 8 Special Edition • 2007612. MS WINDOWS and its extensionsAs far as a real-time operation is concerned threeWindows environments are testedand compared. In fact, one would rather call it ”a soft real-time” [4]. The followingWindow applications are examined:• excited by Windows timer message (WM Timer),• excited by multimedia event timer,• Real-Time Windows Target (RTWT).To perform the tests we need a time reference for the measurements. Softwaretimers are not accurate they introduce unpredictable overhead to the measurements.Fortunately, we can use the 40 MHz clock available at the RT-DAC4/PCI board [2].To measure the accuracy of the timer events the periodic tasks are started in eachinvestigated environments. The only goal of these tasks is read the 40 MHz timer. Thetimer values serve as the time stamps and allow to estimate the jitter of the periodictask.The first experiments related toWindows timer message have been tested. Theperiods of the timer is set to 100 ms or 10 ms. For both experiments the severalindividual tasks were running concurrently. It means that during the experiments MSWindows was heavy loaded.The results in the form of histograms are shown in Figure 1.a) b)100 150 200 250 300 350 40001002003004005006007000 50 100 150 200 250 3000100200300400500600700800900Fig. 1. Windows application excited by WM Timer: a) 100ms-samplingperiod; b) 10ms-sampling periodThere are two mean values: 109.9601 ms and 15.7571ms. These values are faraway from the desired values: 100ms and 10ms. Such an operation is not acceptablefor the control purpose. It shows that the time taken for the system to switch froma given task to the task triggered by the timer message is significantly large and doesnot satisfy measurement and control requirements in the case when the sampling timeis below tens of milliseconds.The next experiments correspond to the Windows application excited by mul-timedia event timer. For example, this method is used by Real-time connection62 Krzysztof Kołek, Andrzej Turnau(RT-CON). The graphical results of two similar experiments of the sampling peri-od equal to 10ms are shown below (see Fig. 2).a) b)0 5 10 15 20 25 300100020003000400050006000700080000 5 10 15 20 25 30010002000300040005000600070008000Fig. 2.Windows application excited by multimedia event timer; similar experiments:a) and b) 10ms-sampling periodThe mean values are correct but a large jitter happens occasionally (even 25 ns).The final experiments correspond toWindows extended to RTWT. The graph-ical results of two experiments excited by the sampling periods equal to 10ms and1ms are given below (see Fig. 3).a) b)9.98 9.985 9.99 9.995 10 10.005 10.01 10.015010020030040050060070080090010000.975 0.98 0.985 0.99 0.995 1 1.005 1.01 1.015 1.02 1.0250200400600800100012001400160018002000Fig. 3. Windows application extended to RTWT: a) 10ms-sampling period;b) 1ms-sampling periodThe mean values are correct. We observe a small jitter. This solution worksperfectly except that it does not support majority of the Windows API functions.For example, USB protocol.The benefits and drawbacks of the presented experiments are summarized inTable 1. One can notice that it is hard to find an ideal omnipotent solution. In thetwo first cases to access I/O memory space one needs to apply a dedicated driver. InFPGA as a part of MS WINDOWS control environment 63the RTWT case which seems to be the most suitable tool almost all the WindowsAPI functions are not supported.We can create add-on functionality via extensions to MS Windows which mayimprove to a large extent responsiveness of originalWindows. The primary goal is tominimize pre-emptive and interrupt latency. Unfortunately Microsoft kernels do notprovide deterministic response.Table 1Benefits and drawbacks of the presented MS Windows environmentsBenefits DrawbacksThe Windowsapplicationexcited byWindows timermessageWM TimerEach Windows are supportedby the MFC library. Allfunctions from the Windowsapplication programmerinterface (API) operatesproperlyThe average jitter is acceptable.I/O memory space is availabledue to drivers onlyThe Windowsapplicationexcited bymultimedia eventtimerThe average jitter is acceptable.Nearly all functions fromWindows API operatesproperly For example, supportfor USBA large jitter happensoccasionally. I/O memory spaceis available due to dedicatedI/O drivers onlyReal-TimeWindowsTarget RTWTSmall jitter. Very good timestabilityAlmost every function fromWindows API is notsupported. I/O memory space isavailable3. FPGA based time-critical operationsThe Field Programmable Gate Arrays (FPGA) contain a matrix of cells ready to beconfigured by a user to satisfy a desired utility goal. The capacity of the FPGA chipsis high enough to implement user-designed processors. As far as the data processingvelocities are compared the FPGA-based parallel execution and hardware implemen-tation of the data processing algorithms significantly outperform the classical micro-processor operating modes. High speed is achieved due to advanced technology andthrough improved architecture, and supports system clock high rates (in our design40 MHz). One has to remember that safety in control environment depends on a timedelay that the system responds to a critical event. In a FPGA-based system it means25 ns or less (in a case of a higher than 40 MHz clock rate). If a PC-based systemis concerned the time delay is a few s. FPGA is hundreds or thousands times fasterdue to its parallel operation and due to the fact that the processing algorithms areimplemented in hardware. Nevertheless high speed, it is hard to predict a worst-caseguaranteed performance because delays in FPGA logic cells are layout dependent.64 Krzysztof Kołek, Andrzej TurnauCritical part of a design are shift registers and counters. They should run faster ap-proximately two thirds of the specified toggle rate.Fig. 4. Block diagram of the RT-DAC4/PCI board (courtesy Inteco Ltd)One can use a vast number of complex and advanced computer boards equippedwith FPGA. We focus our attention to RT-DAC4/PCI board (see Fig. 4) whichinclude two main elements: the PLX9030 PCI bridge and the FPGA chip [3]. Thebridge is the local data bus master responsible for data transfer between the PCI andlocal bus. The local data bus is connected to the FPGA chip. Each analog and digitalI/O function of the board must be implemented as a logic part of the FPGA chip. Bythe computer applications the RT-DAC4/PCI board is visible as a 64 double wordslocated in the I/O address space. An extra 64 double words I/O space is accessible ifinterrupts are considered. The access to the board resources is done by the inp, inpwand inpd or outp, outpw and outpd C-language instructions.FPGA as a part of MS WINDOWS control environment 65The board can run at synchronous system clock rates of 40MHz applied to syn-chronize user-designed logic. The clock signal (40 MHz) born at the board and con-nected to the FPGA chip generates the local bus clock signal which is asynchronousto the PCI bus clock and is independent to the PC microprocessor clock. It meansthat FPGA works autonomously. Even the reset signal to the PC does not affect theFPGA operations. These features create a temptation to use an FPGA chip to beapplied as safety time-critical device.To illustrate safety time-critical operations realized by an FPGA circuit the con-trol of the 3D Crane laboratory system is examined (see Fig. 5). The system can beused to develop even time-optimal control algorithms [5]. The real-time and free ofdelays operation is guaranteed due to functionality embedded in the FPGA logic.Fig. 5. Configuration of the 3D Crane measurement, control and safety systemThere are several critical constrains related to the crane construction and control.It is strictly forbidden to go beyond the 3D Crane system ranges. The bridge and thecart of the crane must remain inside their working space. The temperature and supplyvoltage of the power amplifier are permanently monitored and supervised. A violationof an arbitrary constraint rule has to result in a fast (without a delay) reaction ofthe system. These safety functionality is inserted (configured) directly in FPGA. It isguaranteed that the system responds to a violation of rules within 25 nanoseconds.Beside the critical safety rules the FPGA system is configured to become the interfaceto sensors (encoders) and actuators (the PWM generators applied to control the DCmotors).The controllers are build in Simulink equipped with the RTWT toolbox. Thesecontroller generate controls and define parameters responsible for safety. In this wayone does not need to worry about control safety. Automatic (triggered) behaviors willtake place free of delays of the operating systems. The System on the Chip (SoC)66 Krzysztof Kołek, Andrzej Turnauconfiguration shown in Figure 6 is an extended version of the configuration shown inFigure 5. The SoC approach characterizes reach functionality – it means that multiplesystem components are placed on a single silicon chip [1]. The FPGA circuits containresources sufficient to implement microprocessors, operational memory, interfaces tomeasurement and control signals, interfaces to communication channels, signal pro-cessing blocks, etc. One can decompose tasks and implement them as programmes ofmicroprocessors or dedicated logic blocks. In peculiar, we can define the componentsresponsible for time-critical safety operations.The main benefit of FPGA is its reconfiguration flexibility. It might happens thaturgent modifications to a logic are required. In this case we can introduce them ina very fast and relatively simple way. The modifications do not interfere in hardware!Despite that this new implemented functionality is realised by the FPGA hardware.Fig. 6. System on the Chip configuration4. SummaryMSWindows due to extensions becomes a real-time OS (RTOS). One has to remem-ber that MS Windows equipped with extensions can manage to control simple lab-oratory devices in real-time. However, it is not recommended to apply MSWindowsin time-critical industrial processes. In fact, to ensure safety time-critical operationFPGA as a part of MS WINDOWS control environment 67the FPGA logic is proposed. A microprocessor configured in this logic responds totime-critical events independently to the MSWindows operation.References[1] Kołek K.: FPGA as a Part of Control System. 14th International Conference onProcess Control ’03, Strbske Pleso, Slovak Republic, June 8–11, 2003, p. 207, CD[2] RT-DAC4/PCI Board. Users Guide, http://www.inteco.com.pl[3] Spartan-II 2.5V FPGA Family: Functional description. http://www.xilinx.com[4] Timmerman M.: Windows NT Real-Time Extensions better or worse? Real-TimeMagazin 98–3, pp. 11–19, 1998[5] Pauluk M., Korytowski A., Turnau A., Szymkat M.: Time optimal control of3d crane. Proc. VII IEEE Int. Conf. “Methods and Models in Automation andRobotics”, Międzyzdroje, August 28–31 2001, pp. 927–93268 Krzysztof Kołek, Andrzej Turnau

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FPGA AS A PART OF MS WINDOWS CONTROL ENVIRONMENT

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AGH (Akademia Górniczo-Hutnicza) University of Science and Technology: Journals

Computer Science Journal (AGH University of Science and Technology, Krakow)