Penerbit Universiti Teknikal Malaysia Melaka Press
Abstract
A Phase-locked loop (PLL) is a basic control system that attempts to produce an output waveform that can match with the input reference signal in the shortest time possible. A filter is one of the main components in the PLL blocks, and it plays a very important role to determine the range of input frequency that can ensure the system stays in a locked condition. This paper focuses on designing a fixed-pole active PI filter which is suitable for high-frequency PLL-based circuits such as those used in clock generators. As PLL is bound to fall out of lock due to the nonlinear effects from its phase detector, a new approach is introduced in this work which is to combine the linear and nonlinear control method to ensure stability. Having had the phase margin specified a priori, it is shown by simulation that the allowable range of input frequency such that the system remains locked can be expanded
