A low voltage self-biased high swing cascode current mirror (SHCCM) with improved bandwidth has been proposed. The recently reported SHCCM architecture use the bulk-driven quasi-floating gate (BDQFG) MOS transistors to enhance the effective transconductance which improves the current mirror input resistance and bandwidth range over the same architecture realized using bulk-driven MOS transistors. To further improve the bandwidth the proposed BDQFG based SHCCM uses two resistances which makes the current mirror frequency response free from input capacitors and also reduces the parasitic capacitance effect which results in increased bandwidth with an advantage of having no degradation in other performance parameters of current mirror. The proposed current mirror operates well for input current range from 0 to 200 μA with good linearity and shows the bandwidth of 298 MHz (i.e., 1.6 times over prior reported BDQFG based SHCCM). The observed input and output resistance is 306 Ω and 165 kΩ, respectively. Further, the THD analysis is carried to prove the robustness of proposed current mirror. The complete analysis is performed on UMC 0.18 μm technology using HSpice
