Large and complex ASICs are source of propagating noise inside the powerbus planes. A lumped noise source model is proposed and validated by means of a statistics based method

Antonini, Giulio

Drewniak, James L.

Leone, Marco

Orlandi, Antonio

Ricchiuti, Vittorio

English

Missouri University of Science and Technology (Missouri S&T): Scholars' Mine

Missouri University of Science and Technology Scholars' Mine Electrical and Computer Engineering Faculty Research & Creative Works Electrical and Computer Engineering 01 Oct 2003 Statistical Approach to the EMI Modeling of Large ASICs by a Single Noise-Current Source Giulio Antonini James L. Drewniak Missouri University of Science and Technology, drewniak@mst.edu Marco Leone Antonio Orlandi et. al. For a complete list of authors, see https://scholarsmine.mst.edu/ele_comeng_facwork/1892 Follow this and additional works at: https://scholarsmine.mst.edu/ele_comeng_facwork  Part of the Electrical and Computer Engineering Commons Recommended Citation G. Antonini et al., "Statistical Approach to the EMI Modeling of Large ASICs by a Single Noise-Current Source," Proceedings of Electrical Performance of Electronic Packaging (2003, Princeton, NJ), pp. 345-348, Institute of Electrical and Electronics Engineers (IEEE), Oct 2003. The definitive version is available at https://doi.org/10.1109/EPEP.2003.1250065 This Article - Conference proceedings is brought to you for free and open access by Scholars' Mine. It has been accepted for inclusion in Electrical and Computer Engineering Faculty Research & Creative Works by an authorized administrator of Scholars' Mine. This work is protected by U. S. Copyright Law. Unauthorized use including reproduction for redistribution requires the permission of the copyright holder. For more information, please contact scholarsmine@mst.edu. STATISTICAL APPROACH TO THE EMI MODELING OF LARGE ASKS BY A SINGLE NOISE-CURRENT SOURCE G.Antonini *, J.L.Drewniak ', M.Leone ', A.Orlandi *, V.Ricchiuti ", * UAq EMCLaborafoy, Dept. of Electrical Engineering, University of L'Aquila, L'Aquila, Italy F A X  t39-0862-434403, e-mail: antonini~,ine.univaa.it orlandi@ina.univaa.it UMR EMC Luborarory, ECE Dept., University of Missouri-Rolla, Rolla, MO, USA FAX: Mol-573-341-4532, e-mail: drewniak@ece.umr.edu SIEMENS AG, Corporate Technology, Erlangen, Germany FAX: +49-913 1-7-33 190, e-mail: marco.leone@siemens.com CNX S.p.A. - A SIEMENS Company- L'Aquila, Italy F A X  +39-0862-335527, e-mail: vittorio.ricchiuti@siemens.com * Abstract- Large and complex ASICs a r e  source of propagating noise inside the powerbns planes. A lumped noise source model is proposed and validated by means of a statistics based method. 1. INTRODUCTION Nowadays on-chip integration leading to system-on-chip (SOC) is the most dominant approach to electronic systems. However, it starts to be clear that complete mixed signal SOC-based systems are not realistic. Because of this, system- in-package (SIP) or system-on-package (SOP) are actual fields of research [I]. All of these systems have in common the implementation and use of large and complex ASICs. Due to their high power consumption and fast and highly simultaneous switching activity, these integrated components are often the most relevant source of power-bus noise. This is caused by the fast transient current drawn from the power bus by the powerlground (PWWGND) pins of the ASIC during the switching of the transistors within the core, the logic units and the 110. These transients excite electromagnetic waves propagating in the cavity formed by the power and reference planes, bouncing back and forth between the boards' boundaries, giving rise to signal integrity (SI) and radiated emissions problems. Printed circuit board (PCB) designers must have a knowledge of the simultaneous switching noise (SSN) in order to predict the level of these effects. For simulation purposes, both a model of the power bus and of the ASICs noise are required. Recently a lot of work has been done to the power bus modeling: [2,3] and their reference lists are only an example among a number of significant contributions. At the modeling of large ASKS it has not been given, up to now, too much attention. For small integrated circuits (IC) the number of switching drivers is known and the IC's parameters such as the power dissipation capacitance C,r and the switching time interval At are usually available and can be used for calculating the noise current spectrum [4,5]. For physically large ASICs these parameters are not known or very difficult to be extracted due to the ASIC complex circuitry [6]. Furthermore, multiple pins, spatially distributed under the ASIC's footprint, are connected to the same power bus supplying different parts of the IC (core, I/O, etc.). Because of this, a lumped noise current source model is not self evident. Aim of this work is to analyze the relevance of the position of the power supplying pins to the generation and propagation of interferences inside the power bus and hence to asses the possibility to approximately represent the ASIC's noise behavior by a single source of noise. 11. THE CAVITY RESONATOR MODEL According to the well established cavity-resonator model [2], the two planes forming a power bus are considered as a solid planar structure, of dimensions a and b, separated by a dielectric of thickness h. By solving the radial wave propagation problem between the planes, the Green's function with respect to the source and observation point r=(x,y), r'=(x',y'), respectively, results in [2] in which n and m are the modes indices, the wave number is k i n  = (mn/a)* t (nn/b)2 and the ports' dimensions are considered infinitesimal. The coefficients c,,,  are equal to I for m.n = 0 and and equal to f i  otherwise. The wave number 0-7803-8128-9/03/$17.00 8 2003 LEEE 345 with the angular frequency ar, the magnetic permeability and electric permittivity of the dielectric p and E, respectively, includes the dielectric and ohmic losses, as specified by the loss angle Sand  the skin depth I. Eq.(l) represents the voltage between the two planes at point r, due to a unit current injected at r’. 111. STATISTICAL CONSIDERATIONS A large ASIC is supplied by several PWWGND pin pairs located at different positions inside the ASIC’s footprint on the component layer of the board. Each pair represents a port on the board in the cavity model, through which a cenain noise-current is drawn. The resulting total noise voltage V at the observation point r is the sum of all individual contributions ofeach pin located at r;, i.e. N Q r ) =  G(r,r’i)f, i=l The total number of injecting pins of the ASIC is denoted by N ,  I, are the N individual complex currents associated to the injection points r‘i. In practice, it is not immediate to determine Nand I. Therefore, an approximate lumped-source model was suggested in 161 and validated for the first time by measurements. Based on the total injected current concentrated at the center ofthe ASIC at ro =(x6yO), the voltage Vo produced in r by this single source is The question to be answered is how far the lumped-source model given in (4) is valid in comparison to the exact result (2). For this purpose, a rectangular power bus, lid out with to PWWGND planes adjacent one to another, of length a = 26.5 cm and width b = 20.7 cm has been considered (Fig.]). The two planes have electrical conductivity of copper U= 5.65 lO’S/m and are separated by a dielectric slab with thickness h = 50m, 4 = 4.2, tgS= 0.02, representing typical FR-4 material. The shaded area in Fig.1 represents the surface covered by an ASIC of squared footprint of side I = 3.8 cm, where a number of injecting pins (N= 50) was randomly distributed. To each one of the pins is associated an injected current I, =lf,lejm, whose magnitude and phase are also randomly selected inside the range O i ( 1  , [ < I  - -/Nand 0 i 9, 5 2n respectively. 1, is the maximum c u t “  drawn by the ASIC and estimated by means of power consumption and thermal data. The noise voltages Y and Yo were computed at two locations: “Near” (9.5 cm, 8,5 cm) and “Far” (23.5 cm, 17.7 cm). The ASIC’s footprint is centered at ro = (6.6 cm,6.6 cm). Fig. 1 - Geometry and dimensions of a test board for validation of the lumped-source approximation for an ASIC (the ASIC’s footprint is shadowed). Figs. 2a and 2b show a comparison among the frequency responses obtained by (2) and (4), for the “Near” and “Far” observation point, respectively. The frequency axis is represented by the ratio between the maximum dimension of the ASIC d (the diagonal in this case) and the wavelength 1 in the dielectric. From this computational example it is visible that Vo and Y correspond quite well, up to dlR 0.6, accepting some deviations especially amund the nulls of either the 346 response of V or Vo. In this sense, there is no significant different behavior between an observation point located near or far from the ASIC. It is interesting to note that near the resonances the correspondence is much better. This can be explained by the voltage distribution of a resonant made, which has a much more slower spatial variation in comparison to the superposition of many higher-order modes at non-resonant frequencies. auntd. Fig. 2a - Example for the noise-voltage frequency response [ V0l of the approximate lumped-source model compared to the exact result 14 at port “Near”. M- Fig. 2b - Example for the noise-voltage frequency response I V0l of the approximate lumped-source model compared to the exact result I at port “Far”. A more statistical evaluation of the approximate lumped-source model is shown in Fig.3a and 3h by the average relative deviation IVolq. In each of the two diagrams a number of 50 frequency responses were computed for different and random spatial distribution of 50 injecting pins, each associated to a random current amplitude and phase varying between 0 ... 2 mA and 0 ... 2n (constant over frequency). The average of [Vdq was obtained by calculating the average value of the 50 curves at each frequency point. Fig. 4a and 4b show the standard deviation, normalized with respect the average at each frequency point, of the curves in Figs. 3. They complete the information needed for a meaningful interpretation of the statistics results. . , .  , I“’ 11’ c8 M - Fig. 3a ~ Average relative deviation of the noise-voltage frequency response of the approximate lumped-source model compared to the exact result at port “Near”. Fig. 3b - Average relative deviation of the noise-voltage frequency response of the approximate lumped-source model compared to the exact result at port “Far”. . It is visible that the proposed approximate lumped-source model shows relatively small average deviations up to 0.1 ... 0.2 a, corresponding to a frequency range between 250 MHz and 500 MHz for the chosen geometry. Tolerating a maximum average deviation of lVdq up to 10 dB at certain frequencies, the lumped-source model can be even used up IO approximately 0.6 dm. ... 1 dlh, corresponding to 1.5 GHz to 2.5 GHz. Referring to the observations in Fig.2a and 2b, where the deviations mainly occur near the nulls of the frequency responses, we assume that the above frequency ranges will be higher for smaller power-bus dimensions. 347 .“. Fig. 4a - Normalized standard deviation of the curves in Fig. 3a for port “Near”. Fig. 4b - Normalized standard deviation of the curves in Fig. 3a for port “Far”. IV. CONCLUSIONS From the above results (and the other not shown here for sake of brevity) a first conclusion can be drawn and substantiate: for frequencies such as d/A < 0.1-0.2 the SSN effects of multiple PWWGND pins can be evaluated with sufficient accuracy by considering a lumped-noise current source placed in the geometric center of the ASIC. Relaxing the deviation of V, with respect V up to IO dB the lumped-source model can be used up to 0.6 dl l ,  ... I d/h, corresponding to frequencies ranging above I GHz. This consideration leaves, as only degree of uncertainties, the harmonic content of the lumped current source. Due to the practically unpredictable behavior of each single ASIC supply currents a statistical approach is under development for the assessment of the lumped noise source frequency spectrum. ACKNOWLEDGMENT The authors wish to thank MI. M. Lai with UAq EMC Laborafory for his valuable help in performing the calculations REFERENCES [ l ]  R.R.Tummala, “Changing role of IC and systems packaging: SOC vs. SOP/SIP ”, in Proc. of 7’’ Workshop on Signal Propagation andlnferconnecfs, Siena, Italy, May 11-14,2003, pp.3. 121 N.Na, J.Choi, S.Chun, M. Swaminathan, JSrinivasan, “Modeling and transient simulation of planes in electronic packages”, IEEE Trans. on Advanced Packaging, vol. 33, n. 3, August 2000, pp. 340-352. [3] ].Mao, C.Wang, G.Selli, B.Archambeault, J.L.Drewniak, “Memory DlMM DC power distribution analysis and design”, in Proc. of 2003 IEEE Int. amp. on EMC, Boston, MA, USA, August 18-22,2003. [4] 1. Mao, B. Archambeault, I. L. Drewniak, T. P. Van Doren, “Estimating DC Power Bus Noise”, in Proc. of 2002 IEEE Inf. $“. on EMC, Minneapolis, MN, USA, August 19-23,2002. [5] J.Held, B.Unger, “Measurement of the supply-current and internal impedance of VLSls in a wide frequency range”, Proc. of 2003 IEEElnf. 9mp. on EMC, Istanbul, Turkey, May 11-16,2003, [6] M.Leone, V.Ricchiuti, A.Orlandi, G.Antonini, “Measurement and modeling of the noise current spectrum for large ASICs”, in Proc. of Th Workshop on Signal Propagation and Inferconnects, Siena, Italy, May 11-14,2003, pp.53- 56. [7] G.E.P.Box, W.G.Hunter, J.S.Hunter, Sfafisficsfor Erperimenfers, John Wiley & Sons, New York, NY,USA, 1978. 348 

Statistical Approach to the EMI Modeling of Large ASICs by a Single Noise-Current Source

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Statistical Approach to the EMI Modeling of Large ASICs by a Single Noise-Current Source

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