AN EFFICIENT LOW-POWER CONTENT- ADDRESSABLE MEMORY USING COMPRESSOR MEMORY BLOCK

Abstract

In this paper, we proposed a low-power content-addressable memory (CAM) employing a new algorithm for associativity between the input tag and the corresponding address of the output data. The proposed architecture is based on memory block. Given an input data the proposed architecture compares the stored data with input data and send the single matched data address as the output. Therefore, the dynamic energy consumption of the proposed design is significantly lower compared with that of a sparse Clustered network based CAM design. In this project we have shown as the effective error detection and correction in the data set. For detecting and correcting the data this project allows synergetic reuse COMPRESSOR MEMORY BLOCK.   For very high speed searching applications, Bloom filters has been proposed. Associative memory, associative storage and associative array are the synonyms of CAM. For programming in data structures the name associative array is used most. XILINX ISE was used for the simulation process. The search delay of the proposed design is less. So the speed is more as compared to that of SCN CAM design