International audienceThe cost of the verification process is certainly one of the major engineering issue in the domain of embedded safety-sensitive systems such as avionis. Test environments, made up of dedicated software and hardware means, are among the most significantly contributing factors. This paper reports about an alternative approach where test environments are totally simulated for all test phases. Simulation is not per se a new approach, the expected positive gap is expected from its generalisation. test phases coverage. Our works on this generalised simulation approach are part the ongoing RNTL/ATLAS research project