In recent years, demand for a mixed signal LSI used for electronic equipment is increasing. High precision and low power consumption are required for ADCs for audio applications. ΔΣ ADC is a method to realize highly accurate AD conversion. However, power efficiency is poor as compared with general ADC configuration. This paper proposes a two steps ADC using a SAR-ADC and ΔΣ-ADC. The SAR-ADC arranged in the preceding stage can relax the required performance of the analog circuit of ΔΣ ADC. Therefore, low power consumption can be achieved. This proposal is designed with 0.18um CMOS. The performance of proposed system is confirmed by system simulation using MATLAB / Simulink and circuit simulation using Virtuoso / spectre, respectively
