The receiver is the backbone of modern communication devices. The primary purpose of a reliable receiver is to recover the desired signal from a wide spectrum of transmitted sources. A general radio receiver usually consists of two parts, the radio frequency (RF) front-end and the demodulator. RF front-end receiver is roughly defined as the entire segment until the analog-to-digital converter (ADC) placed before digital demodulation. Theoretically, a radio receiver must be able to accommodate several tradeoffs such as spectral efficiency, low noise figure (NF), low power consumption, and high power gain. The superheterodyne receiver consisting of double downconversion can well balance the tradeoffs required for the receiver design.
In this thesis, the RF front-end superheterodyne receiver design and implementation is presented. Instead of fixed radio frequency of system-on-chip (SOC) design which has been a popular research topic, a radio receiver operating in the wide frequency range of roughly 2.53 GHz to 2.83 GHz located in IEEE S-band is considered. The wide frequency range receiver is suitable for applications like Direct-to-Home satellite television systems, which allocates from 2.5 GHz to 2.7 GHz. This thesis is focusing on the off-chip receiver design for the objectives of processing a wider frequency band while providing high linearity and power gain. The important active devices in a receiver which are low noise amplifiers (LNA), power amplifiers (PA), and mixers are designed and implemented. In this work, the two-stage LNA designed provides low NF and good input standing wave ratio (VSWR). The class-A PA is designed utilizing the load-pull method for maximum power transfer and highest possible power added efficiency (PAE). The mixer design adopts the double balance fully differentially (Gilbert) topology which is ideal for low port feedthrough, intermodulation distortion, and moderate conversion gain.
The self-built active devices (e.g. amplifiers and mixers) and band-pass filters (BPF) provided by Agilent EEsof Advance System Design (ADS) are combined into a double downconversion RF front-end receiver. The receiver sensitivity and selectivity is assessed and tabulated. Also, the operation in the wide frequency range of roughly 2.53 GHz to 2.83 GHz with the last intermediate frequency (IF) of 20 MHz is verified
