Garcia Ordaz, Jose Raul

Koch, Dirk

English

As an alternative of adding more and more in-structions to CPU cores in order to address a wide rangeof applications, this paper examines to use a mixed grainedCPU interlay fabric to provide reconfigurable instruction setextensions. In detail, we are examining to replace the hardenedNEON SIMD unit of an ARM Cortex-A9 with an identical sizedFPGA fabric. We show that by applying a set of optimizations, weare able to emulate original applications using NEON instructionsat the same hardware cost and at very little performance drop byan interlay. Moreover we are demonstrating examples where spe-cial custom instructions running on a CPU-Interlay-hybrid aresubstantially outperforming the original hardened CPU-NEON-system, hence making a strong case to embed reconfigurabilityas a beneficial feature in future processors

The University of Manchester - Institutional Repository

Making a Case for an ARM Cortex-A9 CPU Interlay Replacing the NEON SIMD Unit

Jose Raul Garcia Ordaz

Dirk Koch

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Making a case for an ARM Cortex-A9 CPU interlay replacing the NEON SIMD unit

https://pure.manchester.ac.uk/ws/files/57468964/fpl2017.pdf

Making a case for an ARM Cortex-A9 CPU interlay replacing the NEON SIMD unit

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The University of Manchester - Institutional Repository

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