The paper presents a doping dependent threshold voltage model for the short-channel double-gate (DG) MOSFETs. The channel potential has been determined by solving the two-dimensional (2D) Poisson’s equation using the parabolic potential approximation in the vertical direction of channel. Threshold voltage sensitivity on acceptor doping and device parameters is discussed in detail. The threshold voltage expression has been modified by incorporating the effects of band gap narrowing for highly doped DG MOSFETs. Quantum mechanical corrections have also been employed in the threshold voltage model. The theoretical results have been compared with the ATLASTM simulation results. The present model is found to be valid for acceptor doping variation from 1014 cm–3 to 5 × 1018cm–3.
When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/2789

Dubey, S.

Jit, S.

Tiwari, P.K.

SocioEconomic Challenges Journal (Sumy State University)

 
 
 
J. Nano- Electron. Phys. 
3 (2011) No1, P. 963-971 
 2011 SumDU 
(Sumy State University) 
 
 
963 
PACS numbers: 85.30.Tv, 85.30.De 
 
A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL OF 
UNIFORMLY DOPED SHORT-CHANNEL SYMMETRIC DOUBLE-GATE 
(DG) MOSFET’S 
 
P.K. Tiwari, S. Dubey, S. Jit 
 
 Department of Electronics Engineering 
 Institute of Technology, Banaras Hindu University,  
 Varanasi-221005, U.P, India 
 E-mail: sjit.ece@itbhu.ac.in 
  
The paper presents a doping dependent threshold voltage model for the short-channel 
double-gate (DG) MOSFETs.  The channel potential has been determined by solving 
the two-dimensional (2D) Poisson’s equation using the parabolic potential 
approximation in the vertical direction of channel. Threshold voltage sensitivity on 
acceptor doping and device parameters is discussed in detail. The threshold voltage 
expression has been modified by incorporating the effects of band gap narrowing for 
highly doped DG MOSFETs. Quantum mechanical corrections have also been 
employed in the threshold voltage model. The theoretical results have been compared 
with the ATLASTM simulation results. The present model is found to be valid for 
acceptor doping variation from 1014 cm–3 to 5 × 1018cm–3. 
 
Keywords: DG MOSFET, SHORT-CHANNEL EFFECTS, BAND GAP NARROWING, 
QUANTUM MECHANICAL EFFECTS, THRESHOLD VOLTAGE 
 
(Received 04 February 2011) 
 
1. INTRODUCTION 
 
In keeping pace with state-of-the-art CMOS technology, the present MOS 
devices are found incompetent to be scaled below 45 nm node1. Henceforth, 
it becomes urgent to look for novel devices, like double-gate (DG) MOSFETs, 
to overcome current scaling crisis [2-6]. Researchers have found intense 
scaling opportunities in DG MOSFETs in which undoped and doped channel 
DG MOSFETs are becoming popular because of their specific features [7, 8]. 
Basically, the DG MOSFET structure was envisaged to have an undoped body 
for the following reasons: (1) undoped DG MOSFETs can avoid the dopant 
fluctuation effect, which contributes to the variation of the threshold 
voltage and drive current [9]; (2) the undoped body in DG MOSFETs can 
enhance the carrier mobility owing to the absence of depletion charges which 
can significantly contribute to the effective electric field and hence 
degrading the mobility [10]. However, without body doping as a tool to 
adjust the threshold voltage, undoped DG MOSFETs need to rely on gate 
work function to achieve multiple threshold voltages on a chip. Tunable 
metal gate technology thus needs to be used for DG MOSFETs which is yet 
to be developed [11, 12]. In the light of this fact, body doping remains a sole 
alternative to set appropriate threshold voltages for DG MOSFETs [13]. In 
addition to these facts, doped DG MOSFETs have found wide application in 
memory (1T SRAM), analog circuit and RF circuit applications [14]. DG 
 
 
 
964 P.K. TIWARI, S. DUBEY, S. JIT  
MOSFET based circuit implementation in the subthreshold regime of device 
operation is the current trend in low-power VLSI design. For proper design 
of  such  type  of  circuits,  threshold  voltage  determination  of  DG  MOSFET  
becomes important. 
 Various attempts have been made to model the threshold voltage of 
double-gate MOSFET device after the first model presented by Sekigawa et 
al. [15] where reported the novel structure of DG MOSFET and presented 
the threshold voltage model for long channel device only. To study the 
short-channel threshold voltage, they15 used numerical simulation. Agrawal 
et al. [16] presented the short-channel threshold voltage model for DG 
MOSFET, but their model was valid only for highly doped devices. 
Bhattacherjee et al. [17] have also presented the short-channel threshold 
voltage model for doped DG MOSFETs by utilizing the evanescent mode 
analysis to solve the 2D Poisson’s equation. Both the models of Agrawal [16] 
and Bhattacherjee et al. [17] utilized the conventional definition of 
threshold voltage (gate voltage at which minimum surface potential becomes 
twice of Fermi potential i.e. yS min = 2FF).  Later  on,  it  was  demonstrated  
that conventional definition of threshold voltage is not entirely valid for DG 
MOSFET and hence based on some alternative definitions [8, 18-23] 
threshold voltage models have been presented.  
 Francis  et  al.  [18]  and  Moldovan  et  al.  [8]  have  used  the  maximum  
transconductance change (TC) method to present the threshold voltage 
model. However, their model was valid only for long channel devices. Lu et 
al. [19] derived the threshold voltage model based on the approximation that 
the threshold voltage is the gate voltage at which the minimum surface 
potential equals to Eg/2q, where, Eg is the band gap of silicon channel. 
Suzuki et al. [20] have also derived the threshold voltage expression by 
defining the threshold voltage as the gate voltage which can “cause a 
voltage drop g times the built in voltage due to the depleted charge” where g 
is an empirically assigned value. The model reported by Tsormpatzoglou et 
al. [21] and El Hamid et al. [22] considered the threshold voltage as the gate 
voltage at which the minimum carrier charge sheet density Qinv could reach 
a threshold charge density Qth.  Chen  et  al.  [23]  obtained  the  threshold  
voltage by equating the sum of front and back gate inversion charges to the 
substrate doping of the device. Note that, models of Refs. [16, 17] and Refs. 
[8, 18-23] are valid for doped channel DG MOSFET and undoped channel DG 
MOSFETs, respectively. From the above literature survey, it is obvious that 
short channel threshold voltage model for wide acceptor doping variation is 
still missing. 
 In  this  paper,  a  short-channel  threshold  voltage  model  is  presented  for  
acceptor doping range from 1014 cm–3 to 5 × 1018cm–3. Two-dimensional 
Poisson’s equation has been solved with the parabolic potential approximation 
method because of its simplicity compared to the complex evanescent method. 
The unified threshold voltage definition for undoped and doped channel DG 
MOSFETs  is  utilized  [24].  Quantum  mechanical  effects  and  band  gap  
narrowing effects have been taken into consideration to modify the threshold 
voltage expression. The present model is in continuation with our previous 
works [4, 25] to study the subthreshold characteristics of DG MOSFETs. The 
proposed  model  results  have  been  compared  with  the  2D  ATLASTM device 
simulation data where a reasonably good matching has been found between 
the two.  
 
 
 
 A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 965 
2. THEORETICAL MODELING  
 
Schematic structure of DG MOSFET, utilized for modeling and simulation is 
shown in Fig. 1; where where L, tsi, and tox are the gate-length, channel 
thickness and gate-oxide thickness of the device respectively. A uniform p-
type impurity doping concentration Na has been assumed in the silicon 
channel region. Suppose that y(x, y) represents the 2D potential function in 
the channel. Assuming a fully-depleted channel, y(x, y)  can be obtained by 
solving the 2D Poisson equation  
 
 
y y
e
¶ ¶+ =
¶ ¶
2 2
2 2
( , ) ( , ) a
si
qNx y x y
x y
 (1) 
 
 
 
Fig. 1 – Schematic structure of DG MOSFET 
 
by using the following boundary conditions [4] 
 
  y y= = 00( , ) ( )yx y x , (2) 
 
 
y¶ =
¶ =
( , )
0
0
x y
y y
, (3) 
 
 
e yy e ¶é ù- - ± = ±ê ú ¶ë û = ±
( , )
2
2
G
ox
fb
ox
si
si
si
t
V V x tt y y
, (4) 
 
 y =(0,0) biV  (5) 
 
 y = +(0, ) bi DSL V V  (6) 
 
Where y0(x) is assumed to be the potential function along the SOI center, esi 
is the permittivity of silicon, eox is the permittivity of the gate-oxide SiO2, 
 
 
 
966 P.K. TIWARI, S. DUBEY, S. JIT  
Vbi is the built-in voltage at the source-channel and drain-channel junctions, 
VG is the gate-source voltage, VDS is the drain-source voltage and Vfb = jm –
– cs – Eg/2q – (kT/q)ln(Na/nie)) is the flat-band voltage, where jm (V) is the 
workfunction of the gate-electrode; cs (V), Eg (eV)  and nie are the electron 
affinity, bandgap energy and effective intrinsic carrier concentration of 
silicon respectively. Note that effective carrier density can be obtained by 
nie = ni exp(DEg/2kT); where ni is intrinsic carrier concentration of the 
silicon, k is Boltzmann constant, DEg refers  band-gap  narrowing  due  to  
heavy doping of channel and can be given as DEg = 19ln(Na/1017) meV. 
Now with help of Eqs.(8) and (17) of Ref. [3], the minima of surface 
potential can be given as  
 
 
( )yy y l
- -
= + ´
2
0min
min 0min 4
G fb si
S
u
V V x t
 (7) 
where, 
 
 
el e
é ù= +ê ú
ë û
2 4
1
4
si si ox
u
ox si
t t
t
 (8) 
 
is the character length associate with the centre channel potential. 
Substituting the value of y0min from Eq. (17) of Ref. [3], into Eq. (7) gives 
 
 
ly e l
æ ö
= + - - -ç ÷ç ÷è ø
2
min 1 22 12 4
u a si
S G fb
si u
qN t
k k V V  (9) 
 
where, k1 and k2 are the constants [3]. 
Now, following the method reported in Ref. [24] for SOI MOSFETs, we can 
define the threshold voltage of the device as the gate voltage at which the 
minimum surface potential is given by  
 
 y y -= = = F + Fmin min 0GS S th FV Vth  (10)   
 
where Vth denotes the threshold voltage of uniformly doped DG MOSFET and  
 
 
ì æ öF = >ï ç ÷
ï è øF = í æ öï <ç ÷ï è øî
0
ln ;
ln ;
a
F T a T
ie
T
T a T
ie
N
V N n
n
n
V N n
n
 (11) 
 
where nT is the threshold charge density [21, 22]. The threshold charge 
density nT has been evaluated by the charge calibration method as suggested 
by Chen et al. [7] and Lee et al. [24]. 
 Substituting yS min by yS min–th in Eq. (9) and putting VG = Vth,  we  can  
write the threshold voltage Vth in the polynomial form as 
 
( ) ( )ly e l l-
æ öæ ö æ ö
= + + - - - - -ç ÷ç ÷ ç ÷ç ÷ ç ÷ç ÷è ø è øè ø
2 2
min 1 2 12 4 4
u a si si
th S th fb u u th u u th
si u u
qN t t
V V D Q V E R V ,(12) 
 
 
 
 A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 967 
where, 
 
l
e l
l l
æ öæ öæ ö+ + + - -ç ÷ç ÷ç ÷ ç ÷ç ÷è ø è øè ø=
æ ö æ ö
- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø
2
1 exp
2
2 2
exp exp
u a
DS bi fb
si u
u
u u
qN
V V V L
D
L L
, (13) 
 
  
 
l
l l
æ öæ ö
- -ç ÷ç ÷ç ÷ç ÷è øè ø=
æ ö æ ö
- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø
2
1 exp
2 2
exp exp
u
u
u u
L
Q
L L
, (14) 
 
l
e l
l l
æ öæ öæ ö+ + - -ç ÷ç ÷ç ÷ ç ÷ç ÷è ø è øè ø=
æ ö æ ö
- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø
2
exp 1
2
2 2
exp exp
u a
bi fb DS
si u
u
u u
qN
V V L V
E
L L
   (15) 
 
 
l
l l
æ öæ ö
-ç ÷ç ÷ç ÷ç ÷è øè ø=
æ ö æ ö
- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø
2
exp 1
2 2
exp exp
u
u
u u
L
R
L L
 (16) 
 
It may be noted that under the limiting condition of L ® ¥ (i.e.  long  
channel device), last term of Eq. (12) tends towards zero; and long channel 
threshold voltage Vth–L can be obtained as  
 
ly e l- -
æ ö
= + + -ç ÷ç ÷è ø
2
min 12 4
u a si
th L S th fb
si u
qN t
V V      (17) 
 
With the help of Eqs. (12) and (17), threshold voltage for short-channel DG 
MOSFET can be given as 
 
 
- + -=
2 4
2
u u u u
th
u
b b a c
V
a
 (18) 
 
where, 
 
 l
æ ö
= - -ç ÷ç ÷è ø
22
1 4 1
4
si
u u u
u
t
a Q R  (19) 
 
 ( )l -
æ ö
= - + -ç ÷ç ÷è ø
22
4 1 2
4
si
u u u u u th L
u
t
b D R Q E V  (20) 
 
 
 
968 P.K. TIWARI, S. DUBEY, S. JIT  
 l-
æ ö
= - -ç ÷ç ÷è ø
22
2 4 1
4
si
u th L u u
u
t
c V D E  (21) 
 
Note that threshold voltage roll-off DVth can be obtained as 
 
 DVth = Vth–L – Vth (22) 
 
Eq. (18) is the proposed model for the threshold voltage for short-channel 
DG MOSFET with channel doping variation from 1014 cm–3 to 5 ´ 1018 cm–3. 
 It is well known fact that for a given bias voltage at gate, the quantum 
potential voltage is lower than the classical one. The difference between the 
two potentials accounts for the increase in the threshold voltage Vt by  an  
amount  
 
 D =
2
28
QM
t
eff si
h
V
qm t
 (23) 
 
Note that the QMtVD  should be added in Vt (Eq.(18)) to obtain the threshold 
voltage of ultrathin (tsi < 5 nm) DG MOSFET devices.  
 
3. RESULTS AND DISCUSSION 
 
In this section, we have compared some theoretical and simulation results of 
the  proposed  model.  The  simulation  results  are  obtained  by  using  the  two-
dimensional ATLASTM Ref. [26] device simulator. The device has been 
simulated using the mid gap material tungsten as gate electrode 
(jm = 4.7 eV). Drift-diffusion (DD) model has been used instead of the energy 
balance  (EB)  model,  since  the  DD  model  can  predict  I-V characteristics of 
short-channel MOS devices more realistically than the EB model [26]. Doping 
dependent mobility model has been implemented in the ATLASTM along with 
the suitable modification in the saturation velocity of the electron (vsta.n) 
[26]. The modified saturation velocity is well suited for the devices having 
L ³ 10 nm. Fermi-Dirac carrier statistics has been used in the simulation 
along with the standard recombination models (srh, aug). The variation of the 
surface potential yS(y) along the channel length has been shown in Fig. 2 for 
the device parameter values of L = 30 nm, tSi = 10 nm , tox = 1.5 nm; and for 
different gate-source voltages VG and drain-source voltage VDS. 
 Note that the reference of potential measurement is Fermi level of 
intrinsic  silicon  in  both  simulation  and  our  model.  Minor  changes  in  the  
source-channel barrier height of a surface due to the increase in the drain-
voltage (i.e. the drain-induced barrier lowering (DIBL)), is observed in this 
case for a fixed value of gate voltage VG. Like the conventional MOSFETs, the 
source-channel barrier is reduced by increasing the gate voltage VG. Long 
channel threshold voltage Vth-L variation with channel doping is shown in 
Fig. 3 for fixed values of silicon channel thickness and gate-oxide thickness. 
 
 
 
 A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 969 
 
Fig. 2 – Surface potential variation along the y axis 
 
Threshold voltage increases with the channel doping only for Na > 1017 cm–3. 
Unlike conventional MOSFET, threshold voltage becomes almost insensitive 
with the channel doping Na < 1017 cm–3. Fig. 4 demonstrates the variation 
of threshold voltage with the channel length for different values of channel 
doping. Threshold voltage decreases with channel length due to short-
channel effects. Increment in channel doping increases threshold voltage and 
hence setting threshold voltage by channel doping may be a good alternative 
of immature metal work-function engineering. It is also obvious that a 
short-channel effect improves with channel doping. Fig. 5 depicts threshold 
voltage roll-off DVth with channel length for different silicon channel  
 
 
 
Fig. 3 – Long channel threshold voltage with channel doping 
 
 
 
 
970 P.K. TIWARI, S. DUBEY, S. JIT  
 
 
Fig. 4 – Variation of threshold voltage with channel length for different channel 
doping 
 
 
 
Fig. 5 – DVth with channel length for tox = 1 nm 
 
thicknesses tsi and gate-oxide thicknesses of tox = 1 nm. At higher channel 
thickness threshold voltage roll-off increases severely because gate losses it 
control over the channel. Further threshold voltage roll-off DVth is shown 
with channel length in Fig. 6 for tox = 1.5 nm. Thicker gate oxide is 
responsible for the larger roll-off in threshold voltage. 
 
4. CONCLUSION 
 
In this paper, a threshold voltage model for short-channel DG MOSFET is 
presented. The effect of doping on threshold voltage is studied in detail. It 
 
 
 
 A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 971 
 
 
Fig. 6 – DVth with channel length for tox = 1.5 nm 
 
is  found  that  unlike  bulk  MOSFET  threshold  voltage  of  DG  MOSFET  is  
constant for mild doping. Threshold voltage roll-off is improved for thinner 
silicon body and oxide thickness. 
 
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4. P.K. Tiwari, C.R. Panda, A. Agarwal, et al., IET Circ. Device Syst. 4, 337 (2010). 
5. A. Tsormpatzoglou, C.A. Dimitriadis, R. Clerc, et al., IEEE T. Electron Dev. 54, 
1943 (2007). 
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7. Q. Chen, E.M. Harrell, J.D. Meindl, IEEE T. Electron. Dev. 50, 1631 (2003). 
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English

A doping dependent threshold voltage model of uniformly doped short-channel symmetric double-gate (DG) MOSFET’s

Electronic Sumy State University Institutional Repository

   J. Nano- Electron. Phys. 3 (2011) No1, P. 963-971  2011 SumDU (Sumy State University)   963 PACS numbers: 85.30.Tv, 85.30.De  A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL OF UNIFORMLY DOPED SHORT-CHANNEL SYMMETRIC DOUBLE-GATE (DG) MOSFET’S  P.K. Tiwari, S. Dubey, S. Jit   Department of Electronics Engineering  Institute of Technology, Banaras Hindu University,   Varanasi-221005, U.P, India  E-mail: sjit.ece@itbhu.ac.in   The paper presents a doping dependent threshold voltage model for the short-channel double-gate (DG) MOSFETs.  The channel potential has been determined by solving the two-dimensional (2D) Poisson’s equation using the parabolic potential approximation in the vertical direction of channel. Threshold voltage sensitivity on acceptor doping and device parameters is discussed in detail. The threshold voltage expression has been modified by incorporating the effects of band gap narrowing for highly doped DG MOSFETs. Quantum mechanical corrections have also been employed in the threshold voltage model. The theoretical results have been compared with the ATLASTM simulation results. The present model is found to be valid for acceptor doping variation from 1014 cm–3 to 5 × 1018cm–3.  Keywords: DG MOSFET, SHORT-CHANNEL EFFECTS, BAND GAP NARROWING, QUANTUM MECHANICAL EFFECTS, THRESHOLD VOLTAGE  (Received 04 February 2011)  1. INTRODUCTION  In keeping pace with state-of-the-art CMOS technology, the present MOS devices are found incompetent to be scaled below 45 nm node1. Henceforth, it becomes urgent to look for novel devices, like double-gate (DG) MOSFETs, to overcome current scaling crisis [2-6]. Researchers have found intense scaling opportunities in DG MOSFETs in which undoped and doped channel DG MOSFETs are becoming popular because of their specific features [7, 8]. Basically, the DG MOSFET structure was envisaged to have an undoped body for the following reasons: (1) undoped DG MOSFETs can avoid the dopant fluctuation effect, which contributes to the variation of the threshold voltage and drive current [9]; (2) the undoped body in DG MOSFETs can enhance the carrier mobility owing to the absence of depletion charges which can significantly contribute to the effective electric field and hence degrading the mobility [10]. However, without body doping as a tool to adjust the threshold voltage, undoped DG MOSFETs need to rely on gate work function to achieve multiple threshold voltages on a chip. Tunable metal gate technology thus needs to be used for DG MOSFETs which is yet to be developed [11, 12]. In the light of this fact, body doping remains a sole alternative to set appropriate threshold voltages for DG MOSFETs [13]. In addition to these facts, doped DG MOSFETs have found wide application in memory (1T SRAM), analog circuit and RF circuit applications [14]. DG    964 P.K. TIWARI, S. DUBEY, S. JIT  MOSFET based circuit implementation in the subthreshold regime of device operation is the current trend in low-power VLSI design. For proper design of  such  type  of  circuits,  threshold  voltage  determination  of  DG  MOSFET  becomes important.  Various attempts have been made to model the threshold voltage of double-gate MOSFET device after the first model presented by Sekigawa et al. [15] where reported the novel structure of DG MOSFET and presented the threshold voltage model for long channel device only. To study the short-channel threshold voltage, they15 used numerical simulation. Agrawal et al. [16] presented the short-channel threshold voltage model for DG MOSFET, but their model was valid only for highly doped devices. Bhattacherjee et al. [17] have also presented the short-channel threshold voltage model for doped DG MOSFETs by utilizing the evanescent mode analysis to solve the 2D Poisson’s equation. Both the models of Agrawal [16] and Bhattacherjee et al. [17] utilized the conventional definition of threshold voltage (gate voltage at which minimum surface potential becomes twice of Fermi potential i.e. yS min = 2FF).  Later  on,  it  was  demonstrated  that conventional definition of threshold voltage is not entirely valid for DG MOSFET and hence based on some alternative definitions [8, 18-23] threshold voltage models have been presented.   Francis  et  al.  [18]  and  Moldovan  et  al.  [8]  have  used  the  maximum  transconductance change (TC) method to present the threshold voltage model. However, their model was valid only for long channel devices. Lu et al. [19] derived the threshold voltage model based on the approximation that the threshold voltage is the gate voltage at which the minimum surface potential equals to Eg/2q, where, Eg is the band gap of silicon channel. Suzuki et al. [20] have also derived the threshold voltage expression by defining the threshold voltage as the gate voltage which can “cause a voltage drop g times the built in voltage due to the depleted charge” where g is an empirically assigned value. The model reported by Tsormpatzoglou et al. [21] and El Hamid et al. [22] considered the threshold voltage as the gate voltage at which the minimum carrier charge sheet density Qinv could reach a threshold charge density Qth.  Chen  et  al.  [23]  obtained  the  threshold  voltage by equating the sum of front and back gate inversion charges to the substrate doping of the device. Note that, models of Refs. [16, 17] and Refs. [8, 18-23] are valid for doped channel DG MOSFET and undoped channel DG MOSFETs, respectively. From the above literature survey, it is obvious that short channel threshold voltage model for wide acceptor doping variation is still missing.  In  this  paper,  a  short-channel  threshold  voltage  model  is  presented  for  acceptor doping range from 1014 cm–3 to 5 × 1018cm–3. Two-dimensional Poisson’s equation has been solved with the parabolic potential approximation method because of its simplicity compared to the complex evanescent method. The unified threshold voltage definition for undoped and doped channel DG MOSFETs  is  utilized  [24].  Quantum  mechanical  effects  and  band  gap  narrowing effects have been taken into consideration to modify the threshold voltage expression. The present model is in continuation with our previous works [4, 25] to study the subthreshold characteristics of DG MOSFETs. The proposed  model  results  have  been  compared  with  the  2D  ATLASTM device simulation data where a reasonably good matching has been found between the two.      A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 965 2. THEORETICAL MODELING   Schematic structure of DG MOSFET, utilized for modeling and simulation is shown in Fig. 1; where where L, tsi, and tox are the gate-length, channel thickness and gate-oxide thickness of the device respectively. A uniform p-type impurity doping concentration Na has been assumed in the silicon channel region. Suppose that y(x, y) represents the 2D potential function in the channel. Assuming a fully-depleted channel, y(x, y)  can be obtained by solving the 2D Poisson equation    y ye¶ ¶+ =¶ ¶2 22 2( , ) ( , ) asiqNx y x yx y (1)    Fig. 1 – Schematic structure of DG MOSFET  by using the following boundary conditions [4]    y y= = 00( , ) ( )yx y x , (2)   y¶ =¶ =( , )00x yy y, (3)   e yy e ¶é ù- - ± = ±ê ú ¶ë û = ±( , )22GoxfboxsisisitV V x tt y y, (4)   y =(0,0) biV  (5)   y = +(0, ) bi DSL V V  (6)  Where y0(x) is assumed to be the potential function along the SOI center, esi is the permittivity of silicon, eox is the permittivity of the gate-oxide SiO2,    966 P.K. TIWARI, S. DUBEY, S. JIT  Vbi is the built-in voltage at the source-channel and drain-channel junctions, VG is the gate-source voltage, VDS is the drain-source voltage and Vfb = jm –– cs – Eg/2q – (kT/q)ln(Na/nie)) is the flat-band voltage, where jm (V) is the workfunction of the gate-electrode; cs (V), Eg (eV)  and nie are the electron affinity, bandgap energy and effective intrinsic carrier concentration of silicon respectively. Note that effective carrier density can be obtained by nie = ni exp(DEg/2kT); where ni is intrinsic carrier concentration of the silicon, k is Boltzmann constant, DEg refers  band-gap  narrowing  due  to  heavy doping of channel and can be given as DEg = 19ln(Na/1017) meV. Now with help of Eqs.(8) and (17) of Ref. [3], the minima of surface potential can be given as    ( )yy y l- -= + ´20minmin 0min 4G fb siSuV V x t (7) where,   el eé ù= +ê úë û2 414si si oxuox sit tt (8)  is the character length associate with the centre channel potential. Substituting the value of y0min from Eq. (17) of Ref. [3], into Eq. (7) gives   ly e læ ö= + - - -ç ÷ç ÷è ø2min 1 22 12 4u a siS G fbsi uqN tk k V V  (9)  where, k1 and k2 are the constants [3]. Now, following the method reported in Ref. [24] for SOI MOSFETs, we can define the threshold voltage of the device as the gate voltage at which the minimum surface potential is given by    y y -= = = F + Fmin min 0GS S th FV Vth  (10)    where Vth denotes the threshold voltage of uniformly doped DG MOSFET and    ì æ öF = >ï ç ÷ï è øF = í æ öï <ç ÷ï è øî0ln ;ln ;aF T a TieTT a TieNV N nnnV N nn (11)  where nT is the threshold charge density [21, 22]. The threshold charge density nT has been evaluated by the charge calibration method as suggested by Chen et al. [7] and Lee et al. [24].  Substituting yS min by yS min–th in Eq. (9) and putting VG = Vth,  we  can  write the threshold voltage Vth in the polynomial form as  ( ) ( )ly e l l-æ öæ ö æ ö= + + - - - - -ç ÷ç ÷ ç ÷ç ÷ ç ÷ç ÷è ø è øè ø2 2min 1 2 12 4 4u a si sith S th fb u u th u u thsi u uqN t tV V D Q V E R V ,(12)     A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 967 where,  le ll læ öæ öæ ö+ + + - -ç ÷ç ÷ç ÷ ç ÷ç ÷è ø è øè ø=æ ö æ ö- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø21 exp22 2exp expu aDS bi fbsi uuu uqNV V V LDL L, (13)     ll læ öæ ö- -ç ÷ç ÷ç ÷ç ÷è øè ø=æ ö æ ö- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø21 exp2 2exp expuuu uLQL L, (14)  le ll læ öæ öæ ö+ + - -ç ÷ç ÷ç ÷ ç ÷ç ÷è ø è øè ø=æ ö æ ö- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø2exp 122 2exp expu abi fb DSsi uuu uqNV V L VEL L   (15)   ll læ öæ ö-ç ÷ç ÷ç ÷ç ÷è øè ø=æ ö æ ö- -ç ÷ ç ÷ç ÷ ç ÷è ø è ø2exp 12 2exp expuuu uLRL L (16)  It may be noted that under the limiting condition of L ® ¥ (i.e.  long  channel device), last term of Eq. (12) tends towards zero; and long channel threshold voltage Vth–L can be obtained as   ly e l- -æ ö= + + -ç ÷ç ÷è ø2min 12 4u a sith L S th fbsi uqN tV V      (17)  With the help of Eqs. (12) and (17), threshold voltage for short-channel DG MOSFET can be given as   - + -=2 42u u u uthub b a cVa (18)  where,   læ ö= - -ç ÷ç ÷è ø221 4 14siu u uuta Q R  (19)   ( )l -æ ö= - + -ç ÷ç ÷è ø224 1 24siu u u u u th Lutb D R Q E V  (20)    968 P.K. TIWARI, S. DUBEY, S. JIT   l-æ ö= - -ç ÷ç ÷è ø222 4 14siu th L u uutc V D E  (21)  Note that threshold voltage roll-off DVth can be obtained as   DVth = Vth–L – Vth (22)  Eq. (18) is the proposed model for the threshold voltage for short-channel DG MOSFET with channel doping variation from 1014 cm–3 to 5 ´ 1018 cm–3.  It is well known fact that for a given bias voltage at gate, the quantum potential voltage is lower than the classical one. The difference between the two potentials accounts for the increase in the threshold voltage Vt by  an  amount    D =228QMteff sihVqm t (23)  Note that the QMtVD  should be added in Vt (Eq.(18)) to obtain the threshold voltage of ultrathin (tsi < 5 nm) DG MOSFET devices.   3. RESULTS AND DISCUSSION  In this section, we have compared some theoretical and simulation results of the  proposed  model.  The  simulation  results  are  obtained  by  using  the  two-dimensional ATLASTM Ref. [26] device simulator. The device has been simulated using the mid gap material tungsten as gate electrode (jm = 4.7 eV). Drift-diffusion (DD) model has been used instead of the energy balance  (EB)  model,  since  the  DD  model  can  predict  I-V characteristics of short-channel MOS devices more realistically than the EB model [26]. Doping dependent mobility model has been implemented in the ATLASTM along with the suitable modification in the saturation velocity of the electron (vsta.n) [26]. The modified saturation velocity is well suited for the devices having L ³ 10 nm. Fermi-Dirac carrier statistics has been used in the simulation along with the standard recombination models (srh, aug). The variation of the surface potential yS(y) along the channel length has been shown in Fig. 2 for the device parameter values of L = 30 nm, tSi = 10 nm , tox = 1.5 nm; and for different gate-source voltages VG and drain-source voltage VDS.  Note that the reference of potential measurement is Fermi level of intrinsic  silicon  in  both  simulation  and  our  model.  Minor  changes  in  the  source-channel barrier height of a surface due to the increase in the drain-voltage (i.e. the drain-induced barrier lowering (DIBL)), is observed in this case for a fixed value of gate voltage VG. Like the conventional MOSFETs, the source-channel barrier is reduced by increasing the gate voltage VG. Long channel threshold voltage Vth-L variation with channel doping is shown in Fig. 3 for fixed values of silicon channel thickness and gate-oxide thickness.     A DOPING DEPENDENT THRESHOLD VOLTAGE MODEL… 969  Fig. 2 – Surface potential variation along the y axis  Threshold voltage increases with the channel doping only for Na > 1017 cm–3. Unlike conventional MOSFET, threshold voltage becomes almost insensitive with the channel doping Na < 1017 cm–3. Fig. 4 demonstrates the variation of threshold voltage with the channel length for different values of channel doping. Threshold voltage decreases with channel length due to short-channel effects. Increment in channel doping increases threshold voltage and hence setting threshold voltage by channel doping may be a good alternative of immature metal work-function engineering. It is also obvious that a short-channel effect improves with channel doping. Fig. 5 depicts threshold voltage roll-off DVth with channel length for different silicon channel     Fig. 3 – Long channel threshold voltage with channel doping     970 P.K. TIWARI, S. DUBEY, S. JIT    Fig. 4 – Variation of threshold voltage with channel length for different channel doping    Fig. 5 – DVth with channel length for tox = 1 nm  thicknesses tsi and gate-oxide thicknesses of tox = 1 nm. At higher channel thickness threshold voltage roll-off increases severely because gate losses it control over the channel. Further threshold voltage roll-off DVth is shown with channel length in Fig. 6 for tox = 1.5 nm. Thicker gate oxide is responsible for the larger roll-off in threshold voltage.  4. CONCLUSION  In this paper, a threshold voltage model for short-channel DG MOSFET is presented. The effect of doping on threshold voltage is studied in detail. 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A doping dependent threshold voltage model of uniformly doped short-channel symmetric double-gate (DG) MOSFET’s

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