Understanding PBTI in Replacement Metal Gate Ge n-Channel FETs With Ultrathin Al2O3 and GeOx ILs Using Ultrafast Charge Trap-Detrap Techniques

Abstract

We report positive bias temperature instability data in replacement metal gate Ge n-channel metaloxide-semiconductor field-effect transistors with an in situ gate stack employing an ultrathin (5 angstrom), stable Al2O3 interlayer (IL) using ultrafast (similar to microseconds) characterization techniques that ensure recovery artifactfree measurements. Comparison with state-of-the-art GeOx IL is also reported besides establishing correlations between band-edge interface trap density (D-it), mobility (mu), and threshold voltage (V-T) instability. Ultrafast measure-stress-measure (UF-MSM), ultrafast measure-stress-detrap-measure (UF-MSDM), stress-induced-leakage-current (SILC), direct-current current-voltage (DCIV), split capacitance-voltage (C-V), and low-temperature full conductance techniques along with a compact model demonstrate that: 1) trap generation occurs at IL/high-k interface during stress; 2) an increase in mu with reduction in D-it does not guarantee better reliability, i.e., V-T shift and mu are uncorrelated due to their dependence on separate regions of the gate stack; 3) contributions to total V-T degradation from trapping and generated traps are mutually exclusive; 4) UF-MSDM is a powerful tool to estimate trap generation; and 5) V-T degradation is directly proportional to high-k thickness, varies inversely with IL thickness, and reduces with annealing