Hochberg, Martin

Müller, Georg

Sack, Martin C.

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Simple Gate-boosting Circuit for Reduced Switching Lossesin Single IGBT DevicesMartin Hochberg, Martin Sack, Georg MuellerKarlsruhe Institute of Technology, Institute for Pulsed Power and Microwave TechnologyHermann-von-Helmholtz-Platz 176344 Eggenstein-Leopoldshafen, GermanyMartin.Hochberg@kit.eduAbstractRise and fall time of current and voltage across an IGBT determine the switching losses underhard switching conditions. Due to parasitic inductances in the gate drive circuit and the deviceleads, gate charging is delayed and hence switching speed is limited. The simple gate-boostingcircuit under investigation enables fast charging of the gate capacitance by applying 80 V exter-nal gate drive voltage while not exceeding the specified maximum voltage across the internalgate capacitance. Under hard switching conditions at a collector current of 80 % of the max-imum rated pulse current, reduction of turn-on speed and turn-on losses in the order of 90 %could be achieved.1. IntroductionUnder hard switching conditions, current and voltage occur across the switch at the same time,causing switching losses. Switching losses, as product of voltage and current, can be de-creased by decreasing the switching time. One method is to employ inherently fast switchingelements such as MOSFETs. However, their conduction losses are comparably high. Onealternative are IGBTs exhibiting lower conduction losses. The switching speed of IGBTs (andas well of MOSFETs) might be increased by the application of increased voltage to the gateterminal (so called gate boosting), [1]. While other researchers ([1], [2]) employ complex gatedrive circuits, the proposed gate drive circuit in this work has been designed without additionalactive elements to operate at a driver voltage of up to 80 V for single IGBT devices.2. Gate drive circuitryOne major challenge in fast switching of IGBTs is the fast charging of the gate capacitance. Theparasitic inductance of the device leads and gate drive circuit hinders the charging process andreduces the switching speed [3]. For faster charging, a higher voltage at the gate terminal isnecessary. However, for operation within the datasheet limits, the maximum voltage across theinternal gate capacitance must not be exceeded. As a result, the upper limit for the charge de-livered to the gate is the value given in the datasheet. The gate drive circuit under investigationas shown in fig. 1 is basically a damped capacitive divider with damping resistors RD, dividingthe driver voltage VGD between the coupling capacitor CC and the internal gate capacitance CGof the IGBT. In the circuit diagram, the IGBT is considered to be an ideal component, whereasits internal components such as gate capacitance CG, parasitic lead inductance LP and internalgate resistor RP are displayed in gray. To compensate charge loss for longer pulses, additionalFig. 1: The gate-boosting circuit under investigation, using drive voltages VGD of up to 80 V. The IGBT’sinternal/parasitic components are shown in gray.charge is supplied via resistor R2 (several kΩ). Diode D1 and resistor R1 ensure that the gatevoltage settles to approximately 15 V in steady on-state. To prevent gate charging during off-state, diode D2 offers a low resistance path to ground when the low-side driver is switched on.Fig. 2: SPICE simulation results together with measurements on the device leads. Parasiticinductances cause a voltage overshoot which does not affect the internal gate capacitance.The black trace in figure 2 shows the measured gate signal at the device leads using a gatedrive voltage of 80 V. The voltage overshoot of around 30 V as seen in the measurement iscaused by the parasitic inductance of the circuit. For reliable operation of the device, how-ever, the voltage across the internal gate capacitance must be limited to the value given inthe datasheet(<20 V, [4]) at all times to prevent damage to the device. To estimate the voltageacross the internal gate capacitance, a SPICE simulation based on ideal components as shownin fig. 1 has been performed. The value of capacitance CG was derived from measurements tobe 18 nF. Values for RP and LP have been iteratively adjusted such, that the simulated voltageacross the device leads (red solid line in fig. 2) matched the measurement(black solid line infig. 2). A good agreement was achieved for 8 nH and 0.8Ω. Under this assumption, the voltageacross the internal gate capacitance (blue dashed line in fig. 2) can be derived from the sim-ulation. As can be seen, it stays well within the specified limits. Therefore, the proposed gatedrive circuit is considered to be suitable for operation even at high driving voltage.3. Experimental resultsThe following results were obtained for a standard IGBT in a TO-247 housing. To ensure hardswitching conditions, the total inductance of the test circuit was kept below 60 nH. As theIGBT showed a pronounced increase of rise time for high currents, the measurements wereconducted at 25 %, 50 % and 80 % of the maximum rated pulse current in single pulse opera-tion (the device under test: 320 A, [4]). The different currents were achieved by adjusting theload resistance, while the collector-emitter voltage was kept constant at 1 kV. Figure 3 showscollector-emitter current as well as collector-emitter voltage across the IGBT during switching.As both curves coincide, the inductance of the pulse circuit can be neglected.Fig. 3: Collector current and collector-emitter voltage across the IGBT during the pulse. The lowinductance of the pulse circuit ensures hard switching conditions.The driver voltage has been increased up to 80 V. As reference, the coupling capacitor CCwas shorted for applying a driving voltage of 15 V, representing the standard gate drive. Infigure 4, the collector current for different driver voltages is shown. From the graph it becomesevident that the switching time significantly decreases for higher driver voltage. Figure 5(a)shows the rise time dependence on the driver voltage for different collector currents. As can beseen, the rise time is strongly increased for higher currents. However, with high driver voltageit is possible to speed up switching by approximately the same order of magnitude for highand low currents. For 80 % maximum pulsed current (256 A) a reduction from 400 ns to 50 nsFig. 4: Collector current for different boosting voltages. A strong increase in switching speed is visible.was achieved, which is comparable to the reduction from 125 ns to 18 ns for 25 % maximumpulsed current (80 A). The decrease in fall times, however, as displayed in fig. 5(b) is not aspronounced as for the rise times. In addition, the turn-off times are less susceptible to themagnitude of the gate drive voltage for low currents.(a) (b)Fig. 5:(a): Collector current rise time and(b): fall time for different gate drive voltages at 25 %, 50 % and 80 % of the maximum rated pulsecurrent. The rise time can be influenced to a greater extend by high gate drive voltages.The resulting switching losses at 80 % maximum rated pulse current are shown in fig. 6(a)for different driver voltages. This data was obtained using a low inductance shunt resistor (aspresented in [5]) and a fast high voltage probe. Both measurements were synchronized within2 ns. Figure 6(b) displays the loss energy normalized to the losses using the standard gatedrive. As could be expected from the huge decrease in switching time, the turn-on losses are(a) (b)Fig. 6:(a): Switching losses at 80 % maximum rated pulse current (256 A) for different driver voltages.(b): Dependence of normalized switching losses on the driver voltage during turn-on and turn-off.decreased by 90 % for a driver voltage of 80 V. In agreement with the slower fall time, the turn-off losses can be influenced to a smaller extend as compared to the turn-on losses. However,the reduction of turn-off losses of about 50 % is possible for 80 V driver voltage.4. Summary and ConclusionTo overcome the limitations of IGBTs under hard switching conditions with respect to switchingspeed and switching losses, a simple gate-boosting circuit has been investigated. It allowsfast gate charging by the application of up to 80 V driver voltage. Single trench IGBT deviceshave been operated at up to 80 % maximum rated pulse current in a low-inductance pulsecircuit in single pulse mode. SPICE simulations revealed, that even at 80 V driver voltage,the specifications for the internal gate capacitance were not exceeded. For 80 % maximumrated pulse current it was possible to achieve a reduction of current rise time from 400 ns to50 ns and accordingly a reduction of turn-on losses in the order of 90 %. It was found thatthe turn-off losses are not as strongly dependent on the driver voltage. Hence, a decrease ofturn-off losses by 50 % was achievable for high currents only. Further work will be devoted toin-depth analysis and optimization of the resulting gate signal with respect to switching speedand reliable operation. Another focus will be the applicability of the proposed circuit to differentswitching elements.5. References[1] M. N. Nguyen, R. L. Cassel, J. E. deLamare, and G. C. Pappas. Gate drive for high speed,high power igbts. PPPS-2001: Pulsed Power Plasma Science 2001, Vols I and II, Digest ofTechnical Papers, 2001.[2] Andreas Volke and Michael Hornkamp. IGBT modules: Technologies, driver and applica-tion. Infineon Technologies AG, Munich, 2011.[3] R. Bayerer and D. Domes. Parasitic inductance in gate drive circuits. PCIM Europe Confer-ence Proceedings, pages 473–477, 2012.[4] ON Semiconductor. Datasheet for IGBT NGTB40N120IHLWG,http://www.onsemi.com/pub/collateral/ngtb40n120ihlw-d.pdf, Accessed: Nov. 15, 2015.[5] M. Sack and G. Müller. EMC aspects in the layout of a fast semiconductor switch. Presentedat: Electromagnetic Compatibility in Automotive Engineering, GMM Specialist Conference2014; Dusseldorf; Germany; 11 March 2014 through 13 March 2014.

Simple gate-boosting circuit for reduced switching losses in single IG BT devices

https://publikationen.bibliothek.kit.edu/1000072997/22002307

Simple gate-boosting circuit for reduced switching losses in single IG BT devices

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