IEEE = Institute of Electrical and Electronics Engineers
Abstract
金沢大学理工研究域 電子情報学系A single-chip speech spectrum analyzer which contains a 20-channel filter bank, a 9-bit-resolution analog-to-digital converter, and a 396-bit buffer memory is described. Several efficient design techniques were used to realize the equivalent 308th-order transfer functions on a single chip monolithic MOS circuit. A new time-division-multiplexed switched-capacitor filter technique is introduced which can easily cancel DC offsets which appear in the multiplexed channel outputs. The LSI was fabricated in 3.5-μm CMOS technology, with a 7.0×6.5 mm/SUP 2/ die size, a power consumption of 150 mW, with a single power supply of +5 V. Experimental results show that designed performance was realized
