COSTELLO, Daniel J. Jr.

DENG, Robert H.

Institutional Knowledge at Singapore Management University

Singapore Management UniversityInstitutional Knowledge at Singapore Management UniversityResearch Collection School Of Information Systems School of Information Systems11-1987Decoding of DBEC-TBED Reed-Solomon CodesRobert H. DENGSingapore Management University, robertdeng@smu.edu.sgDaniel J. Jr. COSTELLOUniversity of Notre DameDOI: https://doi.org/10.1109/TC.1987.5009476Follow this and additional works at: https://ink.library.smu.edu.sg/sis_researchPart of the Information Security CommonsThis Journal Article is brought to you for free and open access by the School of Information Systems at Institutional Knowledge at SingaporeManagement University. It has been accepted for inclusion in Research Collection School Of Information Systems by an authorized administrator ofInstitutional Knowledge at Singapore Management University. For more information, please email libIR@smu.edu.sg.CitationDENG, Robert H. and COSTELLO, Daniel J. Jr.. Decoding of DBEC-TBED Reed-Solomon Codes. (1987). IEEE Transactions onComputers. 36, (11), 1359-1363. Research Collection School Of Information Systems.Available at: https://ink.library.smu.edu.sg/sis_research/1491360 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. II, NOVEMBER 1987I. INTRODUCTION the code specified by (1) can be written asError control has long been used to improve the reliability of a2 (a 2)2computer memory systems [1]. The most common approach has been 1I 2(-I )*2 (1,-2)n- Ito use a variation of the Hamming codes such as the single-error- 1 (correcting and double-error-detecting (SEC-DED) binary codes first H=1 1 1 .. . (2)introduced by Hsaio [21. These codes are particularly effective for L a (a2)2 ... ()n-correcting and detecting errors in memories with a 1 bit per chip a (a2)2organization. In these memories a single chip failure can affect at where n < 2m - I Because the code has d = 6, it is capable ofmost one bit in a codeword. corre n t or fewe te cors asimineous ctingLarge scale integration (LSI) and very large scale integration correctingany two orfewerbyteerrors and simultaneously detecting(VLSI) memory systemiis offer significant advantages in size, speed, any combination of three byte errors [1.Let v = (va, v Vn-, ) be a code vector that is written intoand weight over earlier memory systems. These memories are Let r (r, rl, r,-) be the corresp wring iblynormally packaged with a multiple bit (or byte) per chip organization. memory Let r (r0, r1, , r_ 1) be the corresponding (possiblyFor example, some 256K bit dynamic random access memories noisy) vector that is read from memory. Because of possible chip(DRAM's) are organized in 32K x 8 bit-bytes. In this case, a single failures, r may be different from v. The vector difference'chip failure can affect several or all of the bits in a byte, thus eZ.exceeding the error correcting and detecting capability of SEC-DED = r-v=r+V-=(eO, e, , en_ ), (3)codes. where e, * 0 for ri * vi and e, = 0 for ri = vi, is called the errorSeveral papers have been written recently trying to extend the patternSEC-DED codes to include byte errors [3]-[9]. In this correspon- When r - v ± e is read, the decoder computes the syndromedence we investigate the use of Reed-Solomon (RS) codes forcorrecting and detecting byte errors in computer memories. RS codes s= rHT= (v + e)HT= eHT= (5-2 S I ,So1, S2). (4)are a class of nonbinary codes with symbols in the Galois field of 2melements (GF(2m)). These codes are maximum distance separable The syndrome corresponding to a single byte error is(MDS), and thus can provide efficient low overhead error control forbyte-organized memories, since symbol error correction in GF(2m) is S-2 eia-2, (5.1)equivalent to correcting an m-bit byte.For computer memory applications, decoding must be fast and s I eia-, (5.2)efficient. A typical RS decoding procedure is to first calculate theerror syndromes, then use the iterative algorithm [10] to form an =ei, (5.3)error locator polynomial, and finally to search for the roots of theerror locator polynomial, find the error values, and make the actual sl = e1a', (5.4)corrections. The calculation of the error locator polynomial is a major S2 ea2i (5.5)step in decoding RS codes, and it remains a bottleneck for high-speeddecoding, since most errors are single errors and checking for where ei is the error value and i is the error location, 0 c i < n - 1multiple errors is time consuming. High-speed decoding can be and the syndrome corresponding to a double byte error isachieved by using the table-lookup method [1]. However, even formoderate code lengths, the implementation of table-lookup decoding S-2 = eia-2+ ea-2i, (6.1)is impractical, since either a large amount of storage or very complexlogical circuitry is needed. s- I =e1a'-i+eja-, (6.2)In this correspondence we investigate a special high-speed decod-ing technique for double-byte-error-correcting (DBEC), triple-byte- so = ei+ ej, (6.3)error-detecting (TBED) RS codes. This technique is designed tolocate and correct the errors directly without having to find the error s, = ea' + eja1, (6.4)locator polynomial. The occurrences of errors are determined bydirectly testing the weight of the syndrome, denoted by w(s). In S2 = ea2'+ e2eja (6.5)decoding the DBEC-TBED RS code with five parity symbols, if w(s)= 1 or 2, we show that the number of byte errors E ) 3. If w(s) = 3 where 0 < i . j . a - 1.or 4, a simple test is required to determine if E = 2 or ) 3. If w(s) Before proceeding, we need to prove some properties of the d,in =- 5, the decoder quickly determines if E = 1, 2, or 3. Thus, 6 RS code which will be used later.decoding can be carried out in parallel, which in effect increases the Property 1: Let Sd = (s-2, S-151, 5,, S2) ' be the syndromedecoding speed. Double byte error correction is done by forming a corresponding to a double byte error. Let N denote the number ofquadratic equation x2 + x + K = 0, the solution of which gives the zero elements in Sd. Then N c 2, and equality holds in only twotwo byte error locations. The constant K can be determined directly cases:from the syndrome. In this equation, only K contains informationabout the error locations. If a short table is used, with two error 1) S i=S2=0;locations corresponding to each value of K, the decoding speed canbe made even higher. 2) SK=s-2=0Proof: See Appendix A.II. DECODiNG OF A drlni= 6 DBEC-TBED CODE Property 2: Let Sd = (s_2, s_-i, 5o Si, 52)T ThenThe din.] - 6 RS Code and its PropertiesThe generator polynomial for the dmi = 6 RS code is given by 52S-2+5 *0,S,S_2+S- iSo*0,2g() (X±a'), (1) 5051 +S2S-1*O,1= -2for all double byte errors.where ae is a primitive element of GF(2 i). The parity-check matrix of Addition and subtraction are equivalent over GF(2m).IEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. I 1, NOVEMBER 1987 1361Proof: This can be obtained directly from (6.1)-(6.5). The formula for the roots of the quadratic equation is (- b +- 4c)/2. Unfortunately, for finite fields of characteristic two,Decoding Using the Quadratic Equation this formula is not applicable because the denominator is zero.We now show that the well-known quadratic equation over GF(21) However, there are several known approaches to solving thiscan be used to decode the dmin = 6 RS code. If ac is a primitive equation [10]-[13]. The method given in [12] is probably the bestelement of GF(2'"), then a-i' + ca-1 0, 0 < i < j < 2'n - 2. approach, and we summarize it in Appendix B.From (6.1) and (6.3) we haveDecoding the DBEC-TBED Code[ 11o Suppose that a single-byte error with error value ei at location idet [ cc-2j 5 +5 2j occurs. From (5.1)-(5.5) we see that=z- 1l 1 -(a-i+ a-)2 Si*0, for i= -2, -1, 0, 1, 2, (15.1)det --2i 2jLa i andFrom (6.2) and (6.3) we have1 0=--1=cc~~~~(15.2)11 S-2 S-i S SIdet_s-1l cx Il+sOoai Note that (15.2) is equivalent to -yl = 73 =74 =0. That is,ei = _-= a-E+~ .e -i whenever a single-byte error occurs, si 0O for i - -2, - 1, 0, 1, 2,det li 1] and yl = 'Y3 = y4 = 0. From (5.3) and (5.4) we havedetTherefore, i - (16.1)SI+S0cc1 S-_ 2±+Soa-2i ei=so, (16.2)(X-i+cc (ac-'± cc-')2where i gives the error location and ei is the error value of a singleAfter multiplying both sides by (oa-i + a-)2 * 0 and simplifying, byte error.the above equation becomes If a double-byte error occurs, from property 2 and (9.2)-(9.4) weknow that Y2 * 0, y3 * 0, and Y4 # 0. Therefore, b and c in (10.1)s_l(ac'+ajc)+s-2aic'j+sO=O. (7) and (10.2) exist. Hence, (11) has two roots, cci and cci. In otherwords, whenever a double byte error occurs, its error locations canIn the same way, from (6.3)-(6.5), we obtain be found by solving the decoding equation.Since cxi + cci * 0, for 0 . i < j c 2"' - 2, when ac is a1(0X'±+ccJ)+SOc' + 52=0O (8) primitive element of GF(2"), (6.3) and (6.4) imply thatNow define1Y2 _ S2+S_+S0, (9-1) ei= [ ] cc'+cc (17.1)2 - 525_2+S~eO, (9.3) LCE ccj1'Y3 _SIS-2+S-ISO, (9. 3)andY4 _ SOSI+S2S-1 (9.4) ej=so+ei, (17.2)Solving (7) and (8) for cca + cc1 and ccxcc1, we obtain where ei and ej are the error values at locations i and j of the doublebyte error.b A i ±+ oj _'Y2 (10 1) Let ss denote the syndrome corresponding to a single byte error and' S, denote the syndrome corresponding to a triple byte error. Then [1]Ss#Sd#StI (18)C t aci+ cc=j(10.2)'Y3 Based on (18) and properties 1 and 2, we see that if more than twofor 'Y3 0. Therefore, ac' and ac are the roots of elements of the syndrome s = (s_ 2, S_ I, So,52) T equal zero, but atleast one of them does not equal zero, or if 2, 3, and y4 are all noty2+by+c=0. (11) equal to zero, but at least one of them does equal zero, or if thedecoding equation (11) does not have roots in GF(2"'), then at leastThis is the well-known quadratic equation over GF(2"). We will see three byte errors have occurred.later that it plays an important role in decoding. Therefore, we call itthe decoding equation. Equation (11) can be rewritten as Decoding Scheme for the DBED-TBED RS Code (see Fig. 1)K-0 12 ~~~~~~~Readr, and calculate the syndrome ST = rflf = (S-2, i-i, si,+x+±xK- (12) s2) Let w(y') and w(>y") denote the Hamming weights of'y' _ (^YI,byletngy, y4) and '" L (Y2. }3, 7y4), respectively.by lettlng 1~~~~~~~~~~~~)If w(s) = 0, no errors are detected. If w(s) = 1 or 2, £ > 3y=xb, (13) errors are detected. If w(s) = 3 or 4, £ 2 2, and decoding proceedsin step 3). If w(s) = 5, F 2 1, and decoding proceeds in step 2).where 2) Compute 'y. If w(Ty') = 0, F = 1, and calculating cc' = /ogives the error location i. Set the error value e, = sO If w(y') * 0, £K - c/b2. (14) . 2 errors are detected, and decoding proceeds in step 3).1362 IEEE TRANSACTIONS ON COMPUTERS. VOL. C-36, NO. 11, NOVEMBER 1987S_ 2 S-1, S0, Si) S2NoError w~N T(K)=Dompue= y:t~~~~~21 -0E > 3 Compute Y"rFig. 1. DBEC-TBED decoder error location calculator.DetectinDecoded DataL~~~ Fg2.oag Block diga ofta DBufeC-TBED dcer.3 ComputeSyyIf w(y") =3,computeKandr T2(K) Ift T|(K) APPENDX Adoulebyerrr it erorvaue e ad 1 t octios adrro2rl 2caraawastaiwieninarycideenenuecettorthrepetiel.f ) 3oT(K =1,F3r ers atr fdetected.~ ~ ~ ~ ~ ~ ~~~~~Cmpt T KFig.F.2lockdiagram of tDBEC-TBED decoder.e (c cc3) ComputeSy" IIf CONCLUSIONS 2) (3,, computeKa,d ( ,IfDcodedA DItAWe have preseantd eew deoding techique fort doube-byt- rerrorbl-coteerrecting (DBEC), tri te-error-dee (locationsg aT d R se t.ctre o hes syndoe Ft weshowythatif SD = 0, then 0, k te-2,pt1,r1,h2locator poisablynom ia. aHence, hgh-peedDBECoBing Bcaone diachieve D BE-T i eoder.main these codeswellsutedforederrorin corectiniu and detbebtioen-sl [1 ['1 [.bye-corganieomnp terpmemory sytems suchasd LSSand VLSI [airske x +enandEdoe not anvolve mustin solei1)teratindagrthe rotsfiandthe erro -upsSk=Ofrsm2i.Frm(.)(.) ehvlchtorps. ynomial. of high-speed LasilJ be be achieved,byeogaieComputeresu s)(i+a'ndlstejms sc as SI, andcorrec ask LO2j i1i 2cEi] e OkCode efficiency is high since only five parity symbols are used in whereea( 0, ej * 0, and k = -2, -1, 1, 2. But (1, 1) and (cxki,the code. In addition, the basic code length n can be selected to match cxki) are linearly independent, and this implies that the above equationthe organization of the memory (as long as n_ 2m - 1) without is impossible. Hence, Sk .0O, k = -2, -1, 1, 2.changing the decoding method. However, efficiency is maximized Next we show that ifrs = 0 (or S2 = 0), then Sk * 0, k = -2,when n = a 1 is chosen. 0, l,and 2 (or s l) can be either zero or nonzero. It is easy to showIEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. I 1, NOVEMBER 1987 1363that Sk t 0, k = - 2, 0, 1, in the same way as above. Because (c - i, For T4(K) 0, select an element 1 of GF(2m) such that T2(0) = 1,ce j) and (ct2i, a 2J) are linearly dependent for some i and j, there compute K1 =1 + 12, and solve Z2 + z + K1 + K = 0 using (B.5)exists 013 * 0, 12 * 0, 01, /2 E GF(2m), and some i < j, such that with K replaced by K1 + K. Then xl = ,3 + zj is a solution of (12),where z1 is obtained from (B.5). For m = 4, 8, 12, (B.5) reduces to[0 a]i [_j t ] [ ]the following forms:0 a L a ~~~~~~~~~m=4,x1=K8±K'2;Let e' - g1 and ej = 32. From (6.2) and (6.5) we see that the above m=8, xl =K" + K66 129 132.equation becomnes+K KFct'l [-'r-i 1 r a j1 m=12, xl=K2048(1±K64+K256+K'024)[s2 = [0] ei [ +2iJ ±e 2L 2i K129+K258+K513+K 126+ K516+ K132Therefore, s-i = s2 = 0 for some i and J. ACKNOWLEDGMENTBy exactly the same argument as above, we can prove that if s, (or We would like to thank one of the reviewers for pointing out thatS-2) = 0, then Sk * 0, k = - 1, 0, 2, and 5-2 (or s ) can be either similar ideas have been described in U.S. Patents 4 030 067 [14] andzero or nonzero. This completes the proof that N c 2. Q.E.D. 4 099 160 [15].APPENDIX B REFERENCESIn this Appendix we present a method for solving the quadratic [1] S. Lin and D. J. Costello, Jr., Error Control Coding. Fundamentalsequation (12) which is based on [12]. and Applications. Englewood Cliffs, NJ: Prentice-Hall, 1983.Let 1 be any element of GF(2'n), and define [2] M. Y. Hsiao, "A class of optimal minimum odd-weight-column SEC-DED codes," IBMJ. Res. Develop., vol. 14, pp. 395-401, July 1970.n-i [3] D. C. Bossen, "b-Adjacent error correction," IBM J. Res. Develop.,T2(13) = E 13~'. (B.1) vol. 14, pp. 402-408, July 1970.=o [4] D. C. Bossen, L. C. Chang, and C. L. Chen, "Measurement andT2(13) is known as the trace of 13. It is either zero or one [12]. generation of error correcting codes for package failures," IEEEEuTion12Sknowassthe traceGf,B.2It1Sif zeronoronlyifT2K = ([12]. Trans. Comput., vol. C-27, pp. 201-204, Mar. 1978.Equation (12) has solutions in GF(2m) if and only if T2(K) = 0 ([10], [5] S. M. Reddy, "A class of linear codes for error control in byte-per-card[13]). For even m, define organized digital systems," IEEE Trans. Comput., vol. C-27, pp.455-459, May 1978.(m - 2)/2 [6] T. T. Dao, "SEC-DED nonbinary code for fault-tolerant byte-T4(13) - E 1322i (B.2) organized memory implemented with quaternary logic," IEEE Trans.Comput., vol. C-30, pp. 662-666, Sept. 1981.= o1[7] S. Keneda and E. Fujiwara, "Single byte error correcting-double byteerror detecting codes for memory systems," IEEE Trans. Comput.,If (12) has solutions, T4(K) is either zero or one [12]. vol. C-31, pp. 596-602, July 1982.Suppose T2(K) = 0, i.e., (12) has solutions. Let xi be a solution of [8] L. A. Dunning and M. R. Varanasi, "Code constructions for error(12). Then x2 = 1 + xl is the other solution, and we have the control in byte organized memory systems," IEEE Trans. Comput.,following results [12]: vol. C-32, pp. 535-542, June 1983.1) m odd [9] C. L. Chen, "Error-correcting codes with byte error-detection capabil--v K2im-o Kdd ity," IEEE Trans. Comput., vol. C-32, pp. 615-621, July 1983.xI (B.3) 110] E. R. Berlekamp, Algebraic Coding Theory. New York: McGraw-jEJ iEI Hill, 1968.where [11] R. T. Chien, "Cyclic decoding procedures for BCH codes," IEEETrans. Inform. Theory, vol. IT-10, pp. 357-363, Oct. 1964.I= {1, 3, 5, *, m -2}, J={0, 2, 4, *- m - 1}. [12] C. L. Chen, "Formulas for the solutions of quadratic equations,"IEEE Trans. Inform. Theory, vol. IT-28, pp. 792-794, Sept. 1982.2) m - 2 modulo 4 [13] E. R. Berlekamp, H. Ramsey, and G. Solomon, "On the solution ofalgebraic equations over finite fields," Inform. Contr., vol. 18, pp.(m- 6)/4 553-564, Oct. 1967.xl = (K+K2)2 for T4(K)=0, (B.4.1) [14] T. H. Howell et al., "Table lookup direct decoder for double-errori=0 correcting (DEC) BCH codes using a pair of syndromes," U.S. Patent4 030 067, June 14, 1977.(m-6)/4 [15] H. L. Flagg, "Error location apparatus and methods," U.S. PatentXI = al + E (K+K2)2+4, for T4(K)=K1 (B.4.2) 4 099 160, July 4, 1978.,=owhere al is a solution of the equation a 2 + al + 1 0. A Hardwired Generalized Algorithm for Generating the3) m 0O modulo 4 Logarithm Base-k by Iterationx, =S+S2+ K2m - ' (1 + En 4 21 +m) HAO-YUNG LO AND JAU-LING CHENAbstract-A number of previous works of computing the binaryfor 7'4(K)= 1, (B .5) logarithm have been developed by a series of line approximations withwhere Manuscript received September5, 1985; revised Mayl15, 1986.(m/4) - 1 (m/4) - The authors are with the Department of Electrical Engineering, NationalS= E K(22i-l±m/2+221-2). Tsing Hua University, Hsinchu, Taiwan 300.j=1l i=; IEEE Log Number 8714089.0018-9340/87/1 100-1363$01.00 ©B 1987 IEEE

Decoding of DBEC-TBED Reed-Solomon Codes

Singapore Management University 
Institutional Knowledge at Singapore Management University 
Research Collection School Of Information 
Systems School of Information Systems 
11-1987 
Decoding of DBEC-TBED Reed-Solomon Codes 
Robert H. DENG 
Singapore Management University, robertdeng@smu.edu.sg 
Daniel J. Jr. COSTELLO 
University of Notre Dame 
Follow this and additional works at: https://ink.library.smu.edu.sg/sis_research 
 Part of the Information Security Commons 
Citation 
DENG, Robert H. and COSTELLO, Daniel J. Jr.. Decoding of DBEC-TBED Reed-Solomon Codes. (1987). 
IEEE Transactions on Computers. 36, (11), 1359-1363. Research Collection School Of Information 
Systems. 
Available at: https://ink.library.smu.edu.sg/sis_research/149 
This Journal Article is brought to you for free and open access by the School of Information Systems at 
Institutional Knowledge at Singapore Management University. It has been accepted for inclusion in Research 
Collection School Of Information Systems by an authorized administrator of Institutional Knowledge at Singapore 
Management University. For more information, please email library@smu.edu.sg. 
1360 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. II, NOVEMBER 1987
I. INTRODUCTION the code specified by (1) can be written as
Error control has long been used to improve the reliability of a2 (a 2)2
computer memory systems [1]. The most common approach has been 1I
2(-I )*2 (1,-2)n- I
to use a variation of the Hamming codes such as the single-error- 1 (
correcting and double-error-detecting (SEC-DED) binary codes first H=1 1 1 .. . (2)
introduced by Hsaio [21. These codes are particularly effective for L a (a2)2 ... ()n-
correcting and detecting errors in memories with a 1 bit per chip a (a2)2
organization. In these memories a single chip failure can affect at where n < 2m - I Because the code has d = 6, it is capable of
most one bit in a codeword. corre n t or fewe te cors asimineous cting
Large scale integration (LSI) and very large scale integration correctingany two orfewerbyteerrors and simultaneously detecting
(VLSI) memory systemiis offer significant advantages in size, speed, any combination of three byte errors [1.Let v = (va, v Vn-, ) be a code vector that is written intoand weight over earlier memory systems. These memories are Let r (r, rl, r,-) be the corresp wring iblynormally packaged with a multiple bit (or byte) per chip organization. memory Let r (r0, r1, , r_ 1) be the corresponding (possibly
For example, some 256K bit dynamic random access memories noisy) vector that is read from memory. Because of possible chip
(DRAM's) are organized in 32K x 8 bit-bytes. In this case, a single failures, r may be different from v. The vector difference'
chip failure can affect several or all of the bits in a byte, thus eZ.
exceeding the error correcting and detecting capability of SEC-DED = r-v=r+V-=(eO, e, , en_ ), (3)
codes. where e, * 0 for ri * vi and e, = 0 for ri = vi, is called the error
Several papers have been written recently trying to extend the pattern
SEC-DED codes to include byte errors [3]-[9]. In this correspon- When r - v ± e is read, the decoder computes the syndrome
dence we investigate the use of Reed-Solomon (RS) codes for
correcting and detecting byte errors in computer memories. RS codes s= rHT= (v + e)HT= eHT= (5-2 S I ,So1, S2). (4)
are a class of nonbinary codes with symbols in the Galois field of 2m
elements (GF(2m)). These codes are maximum distance separable The syndrome corresponding to a single byte error is
(MDS), and thus can provide efficient low overhead error control for
byte-organized memories, since symbol error correction in GF(2m) is S-2 eia-2, (5.1)
equivalent to correcting an m-bit byte.
For computer memory applications, decoding must be fast and s I eia-, (5.2)
efficient. A typical RS decoding procedure is to first calculate the
error syndromes, then use the iterative algorithm [10] to form an =ei, (5.3)
error locator polynomial, and finally to search for the roots of the
error locator polynomial, find the error values, and make the actual sl = e1a', (5.4)
corrections. The calculation of the error locator polynomial is a major S2 ea2i (5.5)
step in decoding RS codes, and it remains a bottleneck for high-speed
decoding, since most errors are single errors and checking for where ei is the error value and i is the error location, 0 c i < n - 1
multiple errors is time consuming. High-speed decoding can be and the syndrome corresponding to a double byte error is
achieved by using the table-lookup method [1]. However, even for
moderate code lengths, the implementation of table-lookup decoding S-2 = eia-2+ ea-2i, (6.1)
is impractical, since either a large amount of storage or very complex
logical circuitry is needed. s- I =e1a'-i+eja-, (6.2)
In this correspondence we investigate a special high-speed decod-
ing technique for double-byte-error-correcting (DBEC), triple-byte- so = ei+ ej, (6.3)
error-detecting (TBED) RS codes. This technique is designed to
locate and correct the errors directly without having to find the error s, = ea' + eja1, (6.4)
locator polynomial. The occurrences of errors are determined by
directly testing the weight of the syndrome, denoted by w(s). In S2 = ea2'+ e2eja (6.5)
decoding the DBEC-TBED RS code with five parity symbols, if w(s)
= 1 or 2, we show that the number of byte errors E ) 3. If w(s) = 3 where 0 < i . j . a - 1.
or 4, a simple test is required to determine if E = 2 or ) 3. If w(s) Before proceeding, we need to prove some properties of the d,in =
- 5, the decoder quickly determines if E = 1, 2, or 3. Thus, 6 RS code which will be used later.
decoding can be carried out in parallel, which in effect increases the Property 1: Let Sd = (s-2, S-151, 5,, S2) ' be the syndrome
decoding speed. Double byte error correction is done by forming a corresponding to a double byte error. Let N denote the number of
quadratic equation x2 + x + K = 0, the solution of which gives the zero elements in Sd. Then N c 2, and equality holds in only two
two byte error locations. The constant K can be determined directly cases:
from the syndrome. In this equation, only K contains information
about the error locations. If a short table is used, with two error 1) S i=S2=0;
locations corresponding to each value of K, the decoding speed can
be made even higher. 2) SK=s-2=0
Proof: See Appendix A.
II. DECODiNG OF A drlni= 6 DBEC-TBED CODE Property 2: Let Sd = (s_2, s_-i, 5o Si, 52)T Then
The din.] - 6 RS Code and its Properties
The generator polynomial for the dmi = 6 RS code is given by 52S-2+5 *0,
S,S_2+S- iSo*0,
2
g() (X±a'), (1) 5051 +S2S-1*O,
1= -2
for all double byte errors.
where ae is a primitive element of GF(2 i). The parity-check matrix of Addition and subtraction are equivalent over GF(2m).
IEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. I 1, NOVEMBER 1987 1361
Proof: This can be obtained directly from (6.1)-(6.5). The formula for the roots of the quadratic equation is (- b +
- 4c)/2. Unfortunately, for finite fields of characteristic two,Decoding Using the Quadratic Equation this formula is not applicable because the denominator is zero.
We now show that the well-known quadratic equation over GF(21) However, there are several known approaches to solving this
can be used to decode the dmin = 6 RS code. If ac is a primitive equation [10]-[13]. The method given in [12] is probably the best
element of GF(2'"), then a-i' + ca-1 0, 0 < i < j < 2'n - 2. approach, and we summarize it in Appendix B.
From (6.1) and (6.3) we have
Decoding the DBEC-TBED Code
[ 11o Suppose that a single-byte error with error value ei at location i
det [ cc-2j 5 +5 2j occurs. From (5.1)-(5.5) we see that
=z- 1l 1 -(a-i+ a-)2 Si*0, for i= -2, -1, 0, 1, 2, (15.1)
det - -2i 2j
La i and
From (6.2) and (6.3) we have
1 0=--1=cc ~~~~(15.2)11 S-2 S-i S SI
det
_s-1l cx Il+sOoai Note that (15.2) is equivalent to -yl = 73 =74 =0. That is,
ei = _ -= a - E+~ .e -i whenever a single-byte error occurs, si 0O for i - -2, - 1, 0, 1, 2,
det li 1] and yl = 'Y3 = y4 = 0. From (5.3) and (5.4) we havedet
Therefore, i - (16.1)
SI+S0cc1 S-_ 2±+Soa-2i ei=so, (16.2)
(X-i+cc (ac-'± cc-')2
where i gives the error location and ei is the error value of a single
After multiplying both sides by (oa-i + a-)2 * 0 and simplifying, byte error.
the above equation becomes If a double-byte error occurs, from property 2 and (9.2)-(9.4) we
know that Y2 * 0, y3 * 0, and Y4 # 0. Therefore, b and c in (10.1)
s_l(ac'+ajc)+s-2aic'j+sO=O. (7) and (10.2) exist. Hence, (11) has two roots, cci and cci. In other
words, whenever a double byte error occurs, its error locations can
In the same way, from (6.3)-(6.5), we obtain be found by solving the decoding equation.
Since cxi + cci * 0, for 0 . i < j c 2"' - 2, when ac is a1(0X'±+ccJ)+SOc' + 52=0O (8) primitive element of GF(2"), (6.3) and (6.4) imply that
Now define
1Y2 _ S2+S_+S0, (9-1) ei= [ ] cc'+cc (17.1)
2 - 525_2+S~eO, (9.3) LCE ccj1
'Y3 _SIS-2+S-ISO, (9. 3)
and
Y4 _ SOSI+S2S-1 (9.4) ej=so+ei, (17.2)
Solving (7) and (8) for cca + cc1 and ccxcc1, we obtain where ei and ej are the error values at locations i and j of the double
byte error.
b A i ±+ oj _'Y2 (10 1) Let ss denote the syndrome corresponding to a single byte error and
' S, denote the syndrome corresponding to a triple byte error. Then [1]
Ss#Sd#StI (18)
C t aci+ cc=j(10.2)
'Y3 Based on (18) and properties 1 and 2, we see that if more than two
for 'Y3 0. Therefore, ac' and ac are the roots of elements of the syndrome s = (s_ 2, S_ I, So,52) T equal zero, but at
least one of them does not equal zero, or if 2, 3, and y4 are all not
y2+by+c=0. (11) equal to zero, but at least one of them does equal zero, or if the
decoding equation (11) does not have roots in GF(2"'), then at least
This is the well-known quadratic equation over GF(2"). We will see three byte errors have occurred.
later that it plays an important role in decoding. Therefore, we call it
the decoding equation. Equation (11) can be rewritten as Decoding Scheme for the DBED-TBED RS Code (see Fig. 1)
K-0 12 ~~~~~~~Readr, and calculate the syndrome ST = rflf = (S-2, i-i, si,
+x+±xK- (12) s2) Let w(y') and w(>y") denote the Hamming weights of'y' _ (^YI,
byletngy, y4) and '" L (Y2. }3, 7y4), respectively.by lettlng 1~~~~~~~~~~~~)If w(s) = 0, no errors are detected. If w(s) = 1 or 2, £ > 3
y=xb, (13) errors are detected. If w(s) = 3 or 4, £ 2 2, and decoding proceeds
in step 3). If w(s) = 5, F 2 1, and decoding proceeds in step 2).
where 2) Compute 'y. If w(Ty') = 0, F = 1, and calculating cc' = /o
gives the error location i. Set the error value e, = sO If w(y') * 0, £
K - c/b2. (14) . 2 errors are detected, and decoding proceeds in step 3).
1362 IEEE TRANSACTIONS ON COMPUTERS. VOL. C-36, NO. 11, NOVEMBER 1987
S_ 2 S-1, S0, Si) S2
NoError w~N T(K)=Dompue= y:t~~~~~2
1 -0
E > 3 Compute Y"r
Fig. 1. DBEC-TBED decoder error location calculator.
DetectinDecoded Data
L~~~ Fg2.oag Block diga ofta DBufeC-TBED dcer.
3 ComputeSyyIf w(y") =3,computeKandr T2(K) Ift T|(K) APPENDX A
doulebyerrr it erorvaue e ad 1 t octios adrro2rl 2caraawastaiwieninarycideenenuecettorth
repetiel.f ) 3oT(K =1,F3r ers atr f
detected.~ ~ ~ ~ ~ ~ ~~~~~Cmpt T K
Fig.F.2lockdiagram of tDBEC-TBED decoder.e (c cc
3) ComputeSy" IIf CONCLUSIONS 2) (3,, computeKa,d ( ,IfDcodedA DItA
We have preseantd eew deoding techique fort doube-byt- r
errorbl-coteerrecting (DBEC), tri te-error-dee (locationsg aT d R se t .ctre o hes syndoe Ft weshowythatif SD = 0, then 0, k te-2,pt1,r1,h2
locator poisablynom ia. aHence, hgh-peedDBECoBing Bcaone diachieve D BE-T i eoder.
main these codeswellsutedforederrorin corectiniu and detbebtioen-sl [1 ['1 [.
bye-corganieomnp terpmemory sytems suchasd LSSand VLSI [airske x +en
andEdoe not anvolve mustin solei1)teratindagrthe rotsfiandthe erro -upsSk=Ofrsm2i.Frm(.)(.) ehv
lchtorps. ynomial. of high-speed LasilJ be be achieved,
byeogaieComputeresu s)(i+a'ndlstejms sc as SI, andcorrec ask LO2j i1i 2cEi] e Ok
Code efficiency is high since only five parity symbols are used in whereea( 0, ej * 0, and k = -2, -1, 1, 2. But (1, 1) and (cxki,
the code. In addition, the basic code length n can be selected to match cxki) are linearly independent, and this implies that the above equation
the organization of the memory (as long as n _ 2m - 1) without is impossible. Hence, Sk .0O, k = -2, -1, 1, 2.
changing the decoding method. However, efficiency is maximized Next we show that ifrs = 0 (or S2 = 0), then Sk * 0, k = -2,
when n = a 1 is chosen. 0, l,and 2 (or s l) can be either zero or nonzero. It is easy to show
IEEE TRANSACTIONS ON COMPUTERS, VOL. C-36, NO. I 1, NOVEMBER 1987 1363
that Sk t 0, k = - 2, 0, 1, in the same way as above. Because (c - i, For T4(K) 0, select an element 1 of GF(2m) such that T2(0) = 1,
ce j) and (ct2i, a 2J) are linearly dependent for some i and j, there compute K1 =1 + 12, and solve Z2 + z + K1 + K = 0 using (B.5)
exists 013 * 0, 12 * 0, 01, /2 E GF(2m), and some i < j, such that with K replaced by K1 + K. Then xl = ,3 + zj is a solution of (12),
where z1 is obtained from (B.5). For m = 4, 8, 12, (B.5) reduces to
[0 a]i [_j t ] [ ]the following forms:
0 a L a ~~~~~~~~~m=4,x1=K8±K'2;
Let e' - g1 and ej = 32. From (6.2) and (6.5) we see that the above m=8, xl =K" + K66 129 132.
equation becomnes+K K
Fct'l [-'r-i 1 r a j1 m=12, xl=K2048(1±K64+K256+K'024)
[s2 = [0] ei [ +2iJ ±e 2L 2i K129+K258+K513+K 126+ K516+ K132
Therefore, s-i = s2 = 0 for some i and J. ACKNOWLEDGMENT
By exactly the same argument as above, we can prove that if s, (or We would like to thank one of the reviewers for pointing out that
S-2) = 0, then Sk * 0, k = - 1, 0, 2, and 5-2 (or s ) can be either similar ideas have been described in U.S. Patents 4 030 067 [14] and
zero or nonzero. This completes the proof that N c 2. Q.E.D. 4 099 160 [15].
APPENDIX B REFERENCES
In this Appendix we present a method for solving the quadratic [1] S. Lin and D. J. Costello, Jr., Error Control Coding. Fundamentals
equation (12) which is based on [12]. and Applications. Englewood Cliffs, NJ: Prentice-Hall, 1983.
Let 1 be any element of GF(2'n), and define [2] M. Y. Hsiao, "A class of optimal minimum odd-weight-column SEC-
DED codes," IBMJ. Res. Develop., vol. 14, pp. 395-401, July 1970.
n-i [3] D. C. Bossen, "b-Adjacent error correction," IBM J. Res. Develop.,
T2(13) = E 13~'. (B.1) vol. 14, pp. 402-408, July 1970.
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T2(13) is known as the trace of 13. It is either zero or one [12]. generation of error correcting codes for package failures," IEEE
EuTion12Sknowassthe traceGf,B.2It1Sif zeronoronlyifT2K = ([12]. Trans. Comput., vol. C-27, pp. 201-204, Mar. 1978.Equation (12) has solutions in GF(2m) if and only if T2(K) = 0 ([10], [5] S. M. Reddy, "A class of linear codes for error control in byte-per-card
[13]). For even m, define organized digital systems," IEEE Trans. Comput., vol. C-27, pp.
455-459, May 1978.
(m - 2)/2 [6] T. T. Dao, "SEC-DED nonbinary code for fault-tolerant byte-
T4(13) - E 1322i (B.2) organized memory implemented with quaternary logic," IEEE Trans.
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= o1[7] S. Keneda and E. Fujiwara, "Single byte error correcting-double byte
error detecting codes for memory systems," IEEE Trans. Comput.,
If (12) has solutions, T4(K) is either zero or one [12]. vol. C-31, pp. 596-602, July 1982.
Suppose T2(K) = 0, i.e., (12) has solutions. Let xi be a solution of [8] L. A. Dunning and M. R. Varanasi, "Code constructions for error
(12). Then x2 = 1 + xl is the other solution, and we have the control in byte organized memory systems," IEEE Trans. Comput.,
following results [12]: vol. C-32, pp. 535-542, June 1983.
1) m odd [9] C. L. Chen, "Error-correcting codes with byte error-detection capabil-
-v K2im-o Kdd ity," IEEE Trans. Comput., vol. C-32, pp. 615-621, July 1983.xI (B.3) 110] E. R. Berlekamp, Algebraic Coding Theory. New York: McGraw-
jEJ iEI Hill, 1968.
where [11] R. T. Chien, "Cyclic decoding procedures for BCH codes," IEEE
Trans. Inform. Theory, vol. IT-10, pp. 357-363, Oct. 1964.
I= {1, 3, 5, *, m -2}, J={0, 2, 4, *- m - 1}. [12] C. L. Chen, "Formulas for the solutions of quadratic equations,"
IEEE Trans. Inform. Theory, vol. IT-28, pp. 792-794, Sept. 1982.
2) m - 2 modulo 4 [13] E. R. Berlekamp, H. Ramsey, and G. Solomon, "On the solution of
algebraic equations over finite fields," Inform. Contr., vol. 18, pp.
(m- 6)/4 553-564, Oct. 1967.
xl = (K+K2)2 for T4(K)=0, (B.4.1) [14] T. H. Howell et al., "Table lookup direct decoder for double-error
i=0 correcting (DEC) BCH codes using a pair of syndromes," U.S. Patent
4 030 067, June 14, 1977.
(m-6)/4 [15] H. L. Flagg, "Error location apparatus and methods," U.S. Patent
XI = al + E (K+K2)2+4, for T4(K)=K1 (B.4.2) 4 099 160, July 4, 1978.
,=o
where al is a solution of the equation a 2 + al + 1 0. A Hardwired Generalized Algorithm for Generating the
3) m 0O modulo 4 Logarithm Base-k by Iteration
x, =S+S2+ K2m - ' (1 + En
4
21 +m) HAO-YUNG LO AND JAU-LING CHEN
Abstract-A number of previous works of computing the binary
for 7'4(K)= 1, (B .5) logarithm have been developed by a series of line approximations with
where Manuscript received September5, 1985; revised Mayl15, 1986.
(m/4) - 1 (m/4) - The authors are with the Department of Electrical Engineering, National
S= E K(22i-l±m/2+221-2). Tsing Hua University, Hsinchu, Taiwan 300.
j=1l i=; IEEE Log Number 8714089.
0018-9340/87/1 100-1363$01.00 ©B 1987 IEEE


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Decoding of DBEC-TBED Reed-Solomon Codes

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