Logic simulation is a crucial verification task in processor design. Aiming at significant acceleration of system simulation we have parallelized IBM's cycle-based simulator TEXSIM. The resulting parallelTEXSIM has already been employed successfully in simulating S/390 architectures on IBM SP systems. Here we present parallelTEXSIM together with its model partitioning environment

Döhler, Denis

Hering, Klaus

Spruth, Wilhelm G.

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Cycle-based simulation on loosely-coupled systems

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CYCLE -BASED SIMULATION ONLOOSELY -COUPLED SYSTEMSDenis DÄohler, Associate Member, IEEEIBM Germany, S/390 DevelopmentP.O. Box 1380, 71003 BÄoblingen, Germanydoehler@de.ibm.comKlaus Hering, Member, IEEE Wilhelm G. Spruth, Senior Member, IEEEDepartment of Computer Science, University of LeipzigAugustusplatz 10{11, 04109 Leipzig, Germanyfhering, spruthg@informatik.uni-leipzig.deAbstract| Logic simulation is a crucial ver-i¯cation task in processor design. Aiming atsigni¯cant acceleration of system simulation wehave parallelized IBM's cycle-based simulatorTEXSIM. Resulting parallelTEXSIM has al-ready been employed successfully in simulatingS/390 architectures on IBM SP systems. Herewe present parallelTEXSIM together with itsmodel partitioning environment.I. IntroductionVeri¯cation of processor designs is a real challengedue to rapidly growing design complexity. Ensur-ing correctness of logic designs containing millionsof gates requires a large amount of simulation. Forsystem simulation at register transfer level (RTL)and gate level (GL) it has proven to be a goodpractice to separate timing analysis from func-tional veri¯cation (logic simulation). The applica-tion of static timing veri¯ers and cycle-based sim-ulators as tools targeted to the corresponding taskis advantage [9]. Considering functional veri¯ca-tion, cycle-based simulators are signi¯cantly fasterthan event-driven ones which o®er rich function-ality at the cost of performance and memory uti-lization [8]. Hardware accelerators as alternativesto software simulators show high performance butthey are very expensive and di±cult to adapt tochanging simulation techniques.Cycle-based simulation (CBS) can be ab-stractly represented by the ALTER-CLOCK-RETRIEVE pattern (Fig. 1), where CLOCKmeans simulating a number of cycles, ALTERstands for setting values of model componentsfrom outside and RETRIEVE is related to thecheck of such values. Formal description ap-proaches for CBS can be found in [2] and [3].With the availability of commercial programssuch as Cyclone (Synopsis) or SpeedSim/3 (Speed-Sim) in recent years, CBS has become more andmore popular in industry. IBM has been doingCBS for processor veri¯cation at least since theearly 80's. Work presented in this paper is relatedALTER CLOCK RETRIEVEFig. 1 { ALTER{CLOCK{RETRIEVE patternto the IBM internal cycle-based Texas Simulator(TEXSIM) developed by D.S.Zike. Since the pro-duction release of its ¯rst version in 1990 TEXSIMhas become the most important logic simulatorin the various IBM processor developments. Itde¯nes a client-server architecture o®ering a vari-ety of interfaces for simulation control by di®erentkinds of user programs. Simulation models are cre-ated by a simulator speci¯c model compiler out ofa structural circuit description which is generatedby a HDL compiler in the context of the IBM De-sign Automation Database (DA DB). Mixed levelmodels simultaneously containing RTL and GLconstructs are allowed. Originally, TEXSIM hasbeen used for regression runs following a randomsimulation strategy based on a large number ofmainly automatically generated small test cases(machine code or microcode sequences [1]) which1are (automatically again) distributed over a net-work of workstations. For regression runs relatedto complete processor models at system level [7]the evaluation of complex test cases (representingparts of boot processes, for instance) is very de-sirable. To cope with the tremendous amount oftime required by such simulations we have par-allelized TEXSIM based on the assumption thatcorresponding simulation processes should spendvery little time in the ALTER and RETRIEVEsteps relative to the CLOCK step.Our parallelization approach makes use ofmodel inherent parallelism (replicated workerprinciple). A parallelTEXSIM cycle simulation ap-pears as a co-operation of several simulator in-stances evaluating parts of the original model,which are de¯ned statically, on a loosely-coupledprocessor system. Choosing cone-based modelpartitioning gives the possibility of leaving the ker-nel of the optimized TEXSIM simulation engineunchanged. The performance of correspondingparallel simulations strongly depends on preced-ing model partitioning. Because of the relevanceof one partitioning for several extremely time con-suming simulations over one and the same modelwe allow complex partitioning algorithms regard-ing both component communication and workloadaspects.In Section II, our static model partitioningstrategy for parallel cycle-based simulation is out-lined. Then, parallelTEXSIM is introduced in Sec-tion III focussing on its general structure and per-formance relevant issues. Experimental results re-lated to parallel simulations of a real processormodel belonging to the IBM S/390 architectureare presented in Section IV.II. Model PartitioningA. OverviewFor parallelTEXSIM simulations a set of TEXSIMmodels representing parts of an original designhas to be provided together with a cross-referencelist and one signal-cut list per model. The cross-reference list contains all elemental design com-ponents which are accessible from outside duringsimulation and information about their distribu-tion to models. Signal-cut lists comprise model-related input and output points indicating com-munication relations to other models. In Fig. 2the process of model-related input generation forparallelTEXSIM is depicted with protos embodyingDA DB objects for the structural representation ofRTL / GL designs.Fig. 2 { Model-related parallelTEXSIM inputPartitioning starts from a proto generated by aHDL compilation. The number of resulting protoscan be both given in advance or ¯xed by the par-titioning process itself. For every proto delivereda model building process realized by texbld (thesame as for sequential TEXSIM simulation) fol-lows. The parallel simulator automatically adaptsto the number of models generated.B. Partitioning StrategyAs basis for development and analysis of protopartitioning algorithms we have introduced a for-mal Structural Hardware Model (SHM) [5] em-bodying a directed graph with vertices to be in-terpreted as wires, latches, elements of combi-natorial logic or input/output elements, respec-tively. For each proto describing a synchronousdesign a corresponding SHM can be constructedeasily. Then, the problem of proto partitioningcan be considered as a problem of SHM parti-tioning. For a given SHM M , the fan-in coneswith heads representing latches or outputs formthe set Co(M) of basic building blocks for parti-tions ofM . The latter ones appear as partitions ofCo(M) in a mathematical sense. In correspond-ing parallel simulations, inter-processor communi-cation between simulator instances is restricted tocycle boundaries and can be realized by collectivecommunication operations. Obviously, cones mayoverlap. Assigning overlapping cones to di®erentpartition components results in replication of sim-ulation work.2The SHM partitioning problem can be statedas NP-hard combinational optimization problem.Using a formal model of Parallel Cycle Simulation(PCS) [3] we have developed a parameterized costfunction [4] estimating upper run-time bounds forsimulations corresponding to a given SHM parti-tion. This partition valuation function takes intoconsideration both workload aspects and inter-processor communication overhead.Due to the complexity of models representingcomplete processor structures we have introduceda hierarchical partitioning strategy [5] allowingcombination and competition of partitioning al-gorithms and a special merging method of theirresults called superposition. Within a two-levelpartitioning scheme after fast pre-partitioning (re-ducing problem complexity) more expensive algo-rithms working on the basis of hypergraph struc-tures are applied. Speci¯cally, the employment ofEvolutionary Algorithms at the second level hasproven successful.C. Partitioning ToolsA realization of the two-level partitioning schemementioned above is given by PAMB (Partition-ing And Model Build) which has been devel-oped by R.Haupt. It comprises a C-library(containing partitioning algorithms, functions forproto handling, model build and the creation ofhypergraph structures) together with a script-based application framework in the context of theDA DB. PAMB will be integrated in our par-titioning environment parallelMAP (Model Analy-sis and Partitioning). The latter one embodies aclient-server architecture which allows the imple-mentation of parallel partitioning algorithms onmessage-passing basis.III. The Parallel SimulatorA. General StructureWe have implemented parallelTEXSIM based onthe partitioning framework outlined above. Aproduction release of the simulator is employedfor regression runs in the IBM S/390 proces-sor development allowing signi¯cantly larger testcases. From the user's point of view, the par-allel program o®ers the same options and inter-faces as the sequential one. Designed to run onloosely-coupled systems, it represents a master-slave structure (Fig. 3) with component commu-nication via message-passing. A master simu-lator instance (mTEXSIM) derived from sequen-tial TEXSIM provides Application ProgrammingInterfaces (APIs) to the environment and con-trols a set of slave simulator instances (sTEXSIM).These instances contain the original TEXSIM sim-ulation engine encapsulated within a communica-tion shell. parallelTEXSIM permits parallelizationof user programs for simulation control by assign-ing corresponding program instances to simulatorinstances. The software platform currently sup-ported is IBM AIX/6000 with the IBM ParallelEnvironment [6]. This allows networks of IBMRS/6000 workstations and IBM RS/6000 SP ma-chines as target hardware.blockblockmodelblockmodelCommunicationmodelA P IClient Client ClientmTEXSIMsTEXSIMsTEXSIMInterconnectionNetworkDynamic LinkingCommunicationModuleCommunicationModuleCommunicationModule ModulesTEXSIMFig. 3 { Parallel simulator structureB. Facility ManagementFor referencing model elements (signals or arrays)from outside during simulation, TEXSIM providesthe concept of facilities which are representedby bit matrices. Model partitioning for parallelsimulation leads to distribution of accessible el-ements of the original model to di®erent models(described by a cross-reference list mentioned inSection II) possibly related with replication andsplitting. Therefore the facility notion has beenextended to a facility hierarchy to ensure e±-cient element referencing within parallelTEXSIM.We have introduced global, parallel and local fa-cilities. A local facility is a usual facility handled3by a slave simulator instance. The global facilitiesserve to support the usual facilities on a mastersimulator instance as if they were referenced on anon-parallel simulator. In fact they are vectors ofparallel facilities and those are vectors containingreferences to local facilities.Moreover, we have introduced communicationfacilities to achieve fast access to data structureswhich are involved in collective communication op-erations during parallel cycle simulation. Thesedata structures are related to cut signals whicharise from model partitioning. Cut signals aremade known to parallelTEXSIM via model-relatedsignal-cut lists (cf. Section II).C. Component Co-operationWithin parallelTEXSIM three types of collectivemessage-passing are distinguished based on thecomponents involved: "master and one slave","master and all slaves" and "all slaves". Pro-cesses using communication operations of the cor-responding type are for instance facility referenc-ing, creating an initial status protocol and simu-lating cycles in parallel.GETTRANSFERPUTCLOCKFig. 4 { Parallel clock-cycle implementationThe main function of parallelTEXSIM is therealization of the parallel clock-cycle as shownin Fig. 4. During CLOCK one cycle is sim-ulated on all slave instances over the corre-sponding models without interaction. In theGET step, these instances independently providemodel-related global output values within commu-nication vectors. TRANSFER embodies a person-alized all-to-all communication between the slaveinstances. Thereby, communication vector com-ponents are transferred between instances accord-ing to their vector position. This results in newmodel-related communication vectors. In the ¯-nal PUT step, all slave instances (again indepen-dent of one another) update facilities based on thecorresponding communication vectors.Tab. 1. System simulation for an IBM S/390 pro-cessor model with TEXSIM / parallelTEXSIMTest Simulation Performance (cps)Cases 1-way 4-way 8-way 12-waypa013PG060vb0107:60 22:46 30:43 34:677:75 22:42 31:76 35:787:70 23:71 33:47 38:93IV. Experimental ResultsIn the following, we present performance valuesfor parallelTEXSIM running on an IBM SP2 sys-tem (160 MHz Thin Nodes, 1 GByte RAM pernode, 97 MByte/s High Performance Switch) andsimulating a processor model of the IBM S/390architecture containing 1 Processing Unit, 4 L2-Caches, 8 Bus Switching Networks and 8 Stor-age Controllers. The model consists of about 2.7million elements at RTL / GL. We have chosena representative set of test cases which are mi-crocode sequences of di®erent size (pa013 : 294cycles, PG060 : 7464 cycles, vb010 : 31466 cy-cles). Parallel simulations based on model parti-tions with 4, 8 and 12 components are consideredin comparison with corresponding sequential (1-way) TEXSIM simulations (Tab. 1). Performanceis measured in cycles per second (cps).V. Concluding RemarksWe have presented parallelTEXSIM, a parallel logicsimulator running on loosely-coupled systems. Itessentially accelerates time consuming system sim-ulation processes in the IBM S/390 processor de-velopment. Simulation performance strongly de-pends on preceding model partitioning. Our parti-tioning environment allows consideration of work-load and inter-processor communication aspectsvia parameterized partition valuation functions.In future work we will use our experiences withparallelTEXSIM for the parallelization of the IBMMultivalue Simulator MVLSIM. We will concen-trate on problems related to multiply referencedsub-designs, dynamic load balancing in multiuserenvironments and parallelization of user programscontrolling simulation.AcknowledgmentWork presented was supported by DeutscheForschungsgemeinschaft (DFG) under grant4Sp 487/1-1. We are grateful to K.Lamb et al.(IBM Laboratories BÄoblingen) and W.Roesneret al. (IBM Laboratories Austin (TX)) for valu-able assistance. Special thanks to the researchworkers and students involved in the project atthe University of Leipzig.References[1] A. Aharon, A. Bar-David, B. Dorfman, E. Gof-man, M. Leibowitz, and V. Schwartzburd.Veri¯cation of the IBM RISC System/6000 bya dynamic biased pseudo-random test programgenerator. IBM Systems Journal, 30(4), pages1{81, 1991.[2] D. DÄohler. Entwurf und Implementierungeines parallelen Logiksimulators auf Basis vonTEXSIM. Diploma Thesis, Univ. of Leipzig,Dept. of Mathematics, 1996.[3] K. Hering. Parallel Cycle Simulation. Techni-cal Report 13(96), Dept. of Computer Science,Univ. of Leipzig, 1996.[4] K. Hering, R. Haupt, and U. Petri. Parame-terized Partition Valuation for Parallel LogicSimulation. In Proc. of the Conference onParallel and Distributed Computing and Net-works (PDCN'97), pages 144 { 150, 1997.[5] K. Hering, R. Haupt, and T. Villmann. Hi-erarchical Strategy of Model Partitioning forVLSI{Design Using an Improved Mixture ofExperts Approach. In Proc. of the Confer-ence on Parallel and Distributed Simulation(PADS'96), pages 106{113, 1996.[6] M. Snir, P. Hochschild, and D. D. Frye. TheCommunication Software and Parallel Envi-ronment of the IBM SP2 (PE). IBM SystemsJournal, 34(2), pages 185{204, 1995.[7] W. G. Spruth. The Design of a Microproces-sor. Springer Verlag, Berlin, 1989.[8] C. C. Tung and C. Ussery. Face o® : Cycle{Based vs. Event Driven Simulation. Com-puter Design's ASIC DESIGN, pages A14{A17, 1994.[9] K. Westgate and D. McInnis. ReducingLogic Veri¯cation Time with Cycle Simula-tion. SpeedSim, Published in the Internet,http://www.speedsim.com/tech/cyc sim.htm,1996.5

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