SSDs become a major storage component in modern memory hierarchies, and SSD
research demands exploring future simulation-based studies by integrating SSD
subsystems into a full-system environment. However, several challenges exist to
model SSDs under a full-system simulations; SSDs are composed upon their own
complete system and architecture, which employ all necessary hardware, such as
CPUs, DRAM and interconnect network. Employing the hardware components, SSDs
also require to have multiple device controllers, internal caches and software
modules that respect a wide spectrum of storage interfaces and protocols. These
SSD hardware and software are all necessary to incarnate storage subsystems
under full-system environment, which can operate in parallel with the host
system. In this work, we introduce a new SSD simulation framework, SimpleSSD
2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash
technologies (within an SSD), and operate under the full system simulation
environment by enabling a data transfer emulation. Amber also includes full
firmware stack, including DRAM cache logic, flash firmware, such as FTL and
HIL, and obey diverse standard protocols by revising the host DMA engines and
system buses of a popular full system simulator's all functional and timing CPU
models (gem5). The proposed simulator can capture the details of dynamic
performance and power of embedded cores, DRAMs, firmware and flash under the
executions of various OS systems and hardware platforms. Using Amber, we
characterize several system-level challenges by simulating different types of
fullsystems, such as mobile devices and general-purpose computers, and offer
comprehensive analyses by comparing passive storage and active storage
architectures.Comment: This paper has been accepted at the 51st Annual IEEE/ACM
International Symposium on Microarchitecture (MICRO '51), 2018. This material
is presented to ensure timely dissemination of scholarly and technical wor