Arif, Mahwish

Vandierendonck, Hans

English

This work proposes a low-overhead half-barrier pattern to schedule fine-grain parallel loops and considers its integration in the Intel OpenMP and Cilkplus schedulers. Experimental evaluation demonstrates that the scheduling overhead of our techniques is 43% lower than Intel OpenMP and 12.1x lower than Cilk. We observe 22% speedup on 48 threads, with a peak of 2.8x speedup

Queen's University Belfast Research Portal

Poster: Reducing the Burden of Parallel Loop Schedulers for Many-core Processors

Apollo (Cambridge)

POSTER: Reducing the Burden of Parallel LoopSchedulers for Many-Core ProcessorsMahwish ArifQueen’s University Belfastm.arif@qub.ac.ukHans VandierendonckQueen’s University Belfasth.vandierendonck@qub.ac.ukAbstractThis work proposes a low-overhead half-barrier pattern toschedule fine-grain parallel loops and considers its integra-tion in the Intel OpenMP and Cilkplus schedulers. Experi-mental evaluation demonstrates that the scheduling over-head of our techniques is 43% lower than Intel OpenMP and12.1x lower than Cilk.We observe 22% speedup on 48 threads,with a peak of 2.8x speedup.1 IntroductionWhile Moore’s Law remains active, every new processor gen-eration has an increasing number of CPU cores. Schedulingand distributing work load on large scale shared-memorymachines becomes increasingly important to make efficientuse of the hardware. The runtime overhead caused by sched-uling, work distribution and synchronization [1] can makesome parallel codes too fine-grain to make parallel execu-tion worthwhile. This overhead, growing with the degree ofparallelism, can affect the scalability of schedulers.This work focuses on fine-grain, micro-second-scale par-allel loops, comparable in duration to the overhead of state-of-the-art schedulers on current hardware. We reason oncommonly used loop scheduling techniques and propose a“half-barrier” pattern to remove redundant synchronisation.2 ContributionStatic scheduling of parallel loops requires the followingsteps: The master thread 1) divides the loop iteration rangeamong available worker threads, and 2) sends work descrip-tions to the workers. 3) Workers initialize local copies ofreduction variables and execute work sent by the master 4)The master thread waits for the workers to complete, andpartial results are reduced for reduction variables.Permission to make digital or hard copies of part or all of this work forpersonal or classroom use is granted without fee provided that copies arenot made or distributed for profit or commercial advantage and that copiesbear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contactthe owner/author(s).PPoPP ’18, February 24–28, 2018, Vienna, Austria© 2018 Copyright held by the owner/author(s).ACM ISBN 978-1-4503-4982-6/18/02.https://doi.org/10.1145/3178487.3178517join phase release phase idle threads (a) Barrier structuremain thread parallel region join barrier fork barrier idle idle idle idle threads (b) Parallel loopmain thread parallel region join phase release phase idle idle (c) Half-barrier loopFigure 1. Schematic structure of threads and synchroniza-tion in parallel loops and barriersThe synchronization in step 2 and 4 is implemented usingbarriers. Barriers involve a join and a release phase (Fig-ure 1(a)) that respectively records the arrival of threads, andsignals threads to enter the next phase of computation. Typ-ically, at least two barriers are executed per parallel loop(Figure 1(b)). The Intel OpenMP runtime implements reduc-tions on top of a barrier-like construct, which effectivelyintroduces an additional barrier.For the parallel loop model, the worker threads are associ-ated to a specific master which makes some synchronizationsteps redundant. This implies that worker threads are idleand available for work at the start of parallel regions, andare independent of one another. Hence, we can skip the joinpart of fork barrier as the threads do not need to wait foreach other. Similarly, once the workers notify master aboutcompletion of parallel work, there is no need for the masterto send acknowledgement. Hence, the release part of joinbarrier can also be skipped, reducing the synchronizationoverhead from two barriers (Figure 1(b)) to one barrier (Fig-ure 1(c))We use a scalable tree barrier algorithm [2] and tune it tothe organisation of our evaluation machine.The half-barrier can be leveraged further to optimise re-ductions. For static OpenMP loops with reduction variables,the Intel OpenMP runtime executes a tree barrier, in additionto the full barriers at the start and end of the loop, to aggre-gate per-thread results in the join phase of the tree barrier.Our runtime optimizes performance further by merging thereduction operation with the final join half-barrier. This re-sults in two half-barriers for a parallel loop with reductions,compared to three full-barriers with Intel OpenMP runtime.We provide an efficient implementation of Cilk reducersfor fine-grain loops and allocate their thread-local copies383PPoPP ’18, February 24–28, 2018, Vienna, Austria Mahwish Arif and Hans VandierendonckTable 1. Characterizing scheduler burdend ( μs)Fine-grain tree 5.67Fine-grain centralized 7.55Fine-grain tree with full-barrier 12.00OpenMP static 8.12OpenMP dynamic 31.94Cilk 68.80statically at the start of the loop while retaining their pro-gramming interface and non-commutativity. The views arereduced as part of pairwise thread synchronization in thejoin phase of the barrier. This results in exactly P − 1 reduc-tion operations for P threads, as opposed to baseline Cilk forwhich operations may be significantly higher.We extend the Cilk work stealing algorithm to allow staticscheduling for fine-grain loops and dynamic scheduling forcoarse-grain loops by alternating a cycle of the random workstealing algorithm with polling in the half-barrier.3 Experimental EvaluationWe evaluate our schedulers on a 4-socket 2.6 GHz Intel XeonE7-4860 v2 machine with 12 physical cores, 30 MB L3 cacheper socket, and CentOS 7.0. We use thread pinning and nohyper-threads. We use the Intel C/C++ compiler v. 14.0.0for OpenMP and implemented compiler support for the Cilkruntime in clang v. 3.4.1. We calculate speedup against thesequential version of the benchmark.We first use a micro-benchmark to measure loop schedul-ing overhead by varying the amount of work in the parallelloop. The speedup is measured for varying granularity of theloop for the OpenMP, Cilk and our fine-grain scheduler, andthe scheduling burden is estimated using Amdahl’s Law:S =Td +T /48where T is the sequential execution time, S is the resultingspeedup and d is the work distribution time estimated by aleast-squares fit between the measurements and the model.The burden of our fine-grain scheduler is 43% lower thanOpenMP and 12.1x lower than Cilk (Table 1). Using a halfbarrier in our scheduler reduces the scheduling delay furthercompared to a full barrier.Figure 2 shows the performance of our fine-grain sched-uler on Multidimensional Positive Definite Advection Trans-port Algorithm (MPDATA)[3], from the European Centre forMid-range Weather Forecasting, on a grid with 5568 pointsand 16399 edges. The speedup of MPDATA with OpenMPstagnateswith increasing parallelism (Figure 2 (left)) whereasthe fine-grain scheduler increases performance by up to 22%(Figure 2 (right)) over the off-the-shelf Intel OpenMP run-time.?????????? ?? ?? ?? ?????????????????????????????????????????????????????????? ?? ?? ?? ??????????????????????????Figure 2. MPDATA: speedup of fine-grain and OpenMPschedulers (left); speedup of fine-grain scheduler overOpenMP (right)???????????????? ?? ?? ?? ???????????????????????????????????????????????????(a) Linear regression, Cilk?????????????????????? ?? ?? ?? ??????????????????????????????????????????????????????????????????????????(b) Linear regression, OpenMPFigure 3. Performance analysis of map reduce workloadsFigure 3 shows the performance of reductions in our Cilkand OpenMP runtimes using linear regression (medium in-put from Phoenix++ [4]). Our fine-grain scheduler results ina higher parallel efficiency than baseline Cilk and OpenMPschedulers (Figure 3), owing to the reduced scheduling over-head and efficient implementations of reduction. This leadsto a best-case speedup of 2.8.4 ConclusionThis paper demonstrates that scheduling overhead, increas-ing with the degrees of parallelism, limits the performancefor applications with fine-grain loops. A scheduler tuned tofine-grain parallelism, embedded in the Intel OpenMP andCilkplus runtimes, provides speedup for such loops by 22%over the baseline OpenMP and Cilk schedulers, which growswith increasing thread count.References[1] Y. He, C. E. Leiserson, and W. M. Leiserson. 2010. The CilkviewScalability Analyzer. In SPAA ’10. ACM, New York, NY, USA. DOI:http://dx.doi.org/10.1145/1810479.1810509[2] J. M. Mellor-Crummey and M. L. Scott. 1991. Algorithms for scalablesynchronization on shared-memory multiprocessors. ACM Trans.Comput. Syst. 9 (February 1991). DOI:http://dx.doi.org/10.1145/103727.103729[3] P. K. Smolarkiewicz et al. 2016. A finite-volume module for simulatingglobal all-scale atmospheric flows. J. Comput. Phys. 314 (2016).[4] J. Talbot, R. M. Yoo, and C. Kozyrakis. 2011. Phoenix++: ModularMapReduce for Shared-memory Systems. In MapReduce ’11. ACM,New York, NY, USA. DOI:http://dx.doi.org/10.1145/1996092.1996095384

Reducing the burden of parallel loop schedulers for many-core processors

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