Indium nitride (InN) has been the subject of intense research in recent years. Some of its most attractive features are its excellent transport properties such as its small band edge electron effective mass, high electron mobilities and peak drift velocities, and high frequency transient drift velocity oscillations [1]. These suggest enormous potential applications for InN in high frequency electronic devices. But to date the high unintentional bulk electron concentration (n~1018 cm-3) of undoped InN samples and the surface electron accumulation layer make it a hard task to create a reliable metalsemiconductor
Schottky barrier. Some attempts have been made to overcome this problem by
means of material oxidation [2] or deposition of insulators [3]. In this work we present a way to obtain an electrical rectification behaviour by means of heterojunction growth.
Due to the big band gap differences among nitride semiconductors, it’s possible to create a structure with high band offsets. In InN/GaN heterojunctions, depending on the GaN doping, the magnitude of conduction and valence band offset are critical parameters which allow distinguishing among different electrical behaviours. The earliest estimate of the valence band offset at an InN–GaN heterojunction in a wurtzite structure was measured to be ~0.85 eV [4], while the Schottky barrier heights were determined to be ~ 1,4 eV [5].We grew In-face InN layer with varying thickness (between 150 nm and 1 mm) by plasma assisted molecular beam epitaxy (PA-MBE) on GaNntemplates (GaN/Al2O3), with temperatures ranging between 300°C and 450°C. The different doping in GaN template (Si doping, Fe doping and Mg doping) results in differences in band alignments of the two semiconductors changing electrical barriers for carriers and consequently electrical
conduction behaviour. The processing of the devices includes metallization of the ohmic contacts on InN and GaN, for which we used Ti/Al/Ni/Au. Whereas an ohmic contact on InN is straightforward, the main issue was the fabrication of the contact on GaN due to the very low decomposition temperature of InN. A standard ohmic contact on GaN is generally obtained by high temperature rapid thermal annealing (RTA), typically done between 500ºC and 900ºC[6]. In this case, the limitation due to the presence of In-face InN imposes an upper limit on the temperature for the thermal annealing process and ohmic contact formation of about 450°C. We will present results on the morphology of the InN layers by X-Ray diffraction and SEM, and electrical measurements, in particular current-voltage and capacitance-voltage characteristics
