Modeling of SEPIC Fed PMBLDC Motor for Torque Ripple Minimization

Abstract

BLDC Motor suffers from commutation torque ripple, which mainly depends on stator winding impedance, speed and transient line current in the conduction interval. This paper describes a novel circuit topology and a dc input link voltage control strategy to keep incoming and outgoing phase currents changing at the same rate during commutation interval. A SEPIC (single-ended primary inductor converter) and a switch selection circuit are employed in the front of the inverter. The desired commutation voltage is obtained by the SEPIC converter. The input dc link voltage control strategy is carried out by the switch selection circuit to separate two procedures, adjusting the SEPIC converter and regulating speed. The commutation torque ripple is analyzed, and introduced the way to obtain the desired dc link voltage in detail. Finally, simulation and experimental results show that, compared with conventional and the proposed method can obtain the desired voltage is obtained and minimize commutation torque ripple more efficiently