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Development of a Verification Technique for On-wafer Noise Figure Measurement Systems

Abstract

We present the development of a verification technique for on-wafer noise figure (NF) measurement systems. As the key element of the technique, a verification device consisting of a mismatched attenuator and a low noise amplifier (LNA) has been developed. The attenuator and the LNA are fabricated on two separate chips but joined with a bondwire. The verification procedure based on the device has also been developed and tested on an on-wafer vector network analyzer system with a noise measurement option across the frequency range from 2 GHz to 20 GHz. It has also been found that the bondwire contributes to negligible effect on the system when NF is high e.g. 3 dB but slightly higher when NF is smaller e.g. 1 dB

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