Investigating the behaviour of ISFETs with a Ta2O5SiO2 dielectric it has been observed that their long-term stability is strongly influenced by previous exposures to daylight. A Ta2O5 layer, as prepared for ISFET application, will become conductive by exposure to optical radiation. This conduction is due to bulk traps with a depth of 1.6–3.2 eV. It is shown that a low temperature anneal step in the presence of an A1 layer on top of the Ta2O5 layer may eliminate these traps and reduce the associated threshold voltage instability

Bergveld, P.

Voorthuyzen, J.A.

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Photoelectric Effects in Ta2O5-SiO2-Si Structures

University of Twente Research Information

350 Photoelectric Effects in Ta,Os-Si02-Si Structures J. A. VGORTHUYZEN and P. BERGVELD University of Twente, P.O. Box 217, 7500 AE Enschede (The Netherlands) Sensors and Actuators, BI (1990) 350-353 Abstract Investigating the behaviour of ISFETs with a Ta205-Si02 dielectric it has been observed that their long-term stability is strongly influenced by previous exposures to daylight. A Ta,O, layer, as prepared for ISFET application, will become con- ductive by exposure to optical radiation. This conduction is due to bulk traps with a depth of 1.6-3.2 eV. It is shown that a low temperature anneal step in the presence of an Al layer on top of the Ta,O, layer may eliminate these traps and reduce the associated threshold voltage instability. 1. Introduction ISFETs with a Ta,O,-SiOz dielectric often exhibit a worse long-term stability than the re- ported value of 0.1 mV/day [I]. It has been found that the device characteristics strongly depend on the experimental conditions before and during measurements. The samples under investigation for instance showed a 40 mV threshold voltage shift over a period of lo- 15 h, after immersion in a pH solution, preceded by dry storage at labora- tory conditions. A variety of experiments has shown that a phenomenon which disturbs the long-term stabil- ity of electrolyte-Ta,05-SiOz-Si samples is their sensitivity to light. Therefore the photoelectric effects in these structures have been investigated. 2. Device Fabrication Different samples have been realized and com- pared with respect to their drift behaviour, namely MTOS (metal-Ta,O,-SiO,-Si), ETOS (elec- trolyte-Ta,O,-Si02-Si), MOS (metal-SiO,-Si) and EOS (electrolyte-SiO,-Si) structures. The MTOS devices are n-type FETs in a p-type (100) 10 R cm silicon wafer, and fabricated by means of an NMOS process, After thermal growth of 80 nm gate oxide a shallow ion implan- tation step is performed for threshold voltage 0925-4005/90/$3.50 adjustment to - 1 V, followed by a 30 min anneal at 900 “C in dry NZ. Then 50 nm Ta is deposited by e-gun evaporation with a rate of about 15 nm/ min. The Ta layer is patterned and then oxidized at 500 “C in dry O2 during 200 min, yielding a 100 nm thick Ta,O, layer with a relative dielectric constant of 33. Realizing that the relative dielec- tric constant of SiO, is 3.9, this means that the capacitance per unit area C, of the Ta,O, layer is (33/100)/(3.9/80) = 6.8 times larger than the ca- pacitance C, of the Si02 layer. Finally a 1 pm thick layer of Al is deposited for metallization, patterned and annealed at 450 “C in dry N, during 30 min. ETOS structures are realized in the same way, except that in that case the Al metal gate is also etched away during the patterning of this layer. MOS and EOS structures are realized in similar ways to the MTOS and ETOS structures. Only the Ta deposition, patterning and oxidation step are in that case omitted. 3. Initial Experimental Results The samples have been connected to an am- plifier of the source-drain follower type. Using such an amplifier, the current from drain to source/bulk and the drain-source voltage are kept constant. A saturated calomel electrode, con- nected to ground, is used as the reference elec- trode. The amplifier then adjusts the source voltage to satisfy the predetermined bias condi- tions. It can be shown that this means that any change SF, of threshold voltage is accompanied by a change SF, = -S V, of the source voltage. Using this amplifier the pH sensitivity of ETOS samples appeared to be about 56 mV/pH in the whole range pH = 2- 12, which is in good agree- ment with the reported value of 59 mV/pH [ 11. To investigate the photoelectric effects in ETOS samples in more detail, first of all the influence of light on the performance of ETOS devices, as connected to the source-drain follower, has been determined. The samples are immersed in a pH buffer solution, which is placed in a dark and 0 Elsevier Sequoia/Printed in The Netherlands 351 temperature stabilized container. Then they are intermittently exposed to light from a Schott KL1500 cold-light source. The response of the source voltage can be seen from Fig. 1. Considering this Figure, two different effects seem to be present. When light is switched on a rapid increase of the source voltage can be seen, followed by an exponential change during several minutes. It can also be observed that the polarity of this second change depends on the ISFET bias conditions. Using Vds = 0.1 V and Ids = 0.1 mA the source voltage increases as shown in curve A, while for V &= 1 V and &,=O.l mA the source voltage decreases as shown in curve B. After switching off the light a rapid decrease of the source voltage can be seen, followed by a very slow recovery of the original source voltage. The rapid increase of the source voltage after switching on the light, and the corresponding decrease after switching it off is mainly caused by the generation of a photocurrent through the reverse-biased drain-bulk diode, and for a smaller part by a change of the threshold voltage due to the generation of electron-hole pairs in the channel. The other exponential, source voltage shift, is much slower and seems to be due to another bias dependent mechanism in the samples. A change of the bias conditions means a change of the electric field in the insulators. Therefore it can be con- cluded that this effect depends on the applied electric field during exposure to light. The validity of this conclusion has been checked by bias-stress experiments, as shown in Fig. 2. Samples are first connected to a drain- source follower. After measuring the source voltage the sample is connected to a stress voltage Vst, between silicon on one side and reference electrode on the other side. Then the light source is switched on for several minutes. Afterwards the sample is again connected to the drain-source I I , , , , , , 4 8 8 10 B: V& -1.0 v. lpO.1 t?lA Fig. 1. Response of the source voltage of ETOS samples to optical radiation as a function of time, as measured by a source-drain follower for different bias conditions. Curve A: V.,,=O.l V and I,=O.l mA, curve B: V,,= 1 V and r,=o.1 mA. l ,i,,,; voltoge l= Fig. 2. Experimental set-up for bias-stress measurements. follower. Then within several minutes the applied source voltage is measured again. To avoid dielec- tric breakdown only positive stress voltages were applied. In Fig. 3 the source voltage has been plotted as a function of stress voltage Vsu, related to the value Vso, measured after applying zero stress voltage. It should be noted that source voltage shift and stress voltage are almost linearly related to each other, and that the observed behaviour is reversible. Performing however the same experiments with EOS samples, no significant source voltage shift has been observed. Several mechanisms may be responsible for the observed behaviour of ETOS samples, namely (a) degradation of electron mobility in the silicon (b) generation/recombination of SiOz- Si in- terface states (4 electrical polarization in the insulators (4 charge injection in the insulators “.tr M I 1 2 3 4 5 Fig. 3. Measured source voltage of ETOS samples as a func- tion of applied stress voltage, after exposure to optical radia- tion. 352 Due to the observed linear relation between source voltage shift and applied stress voltage, as well as the fact that EOS samples do not exhibit such effects as ETOS samples do, it can be con- cluded that only an effect in the insulator (polar- ization or charge injection) can be responsible for the observed phenomena. Realizing that the slope of the curve in Fig. 3 is 0.12, which value corresponds rather well with the ratio C,/C, = l/6.8, it can be concluded that the source voltage shift is due to storage and removal of charge at the Ta,O,-SiOz interface through a Ta,O, layer, which is (semi)conductive while ex- posed to optical radiation. In order to explain this it is assumed that the original threshold voltage, measured after apply- ing zero stress voltage to the sample, corresponds to zero electric field in the Ta,O, and potential Vi and charge Qi at the Ta,O,-SiO, interface. If now a stress voltage V,,, is applied to the silicon while the Ta,O, layer is conductive due to optical radia- tion, a current is flowing through it until the electric field in this layer is again zero. The poten- tial at the Ta,O,-SiO, interface is then again equal to Vi, but the charge at the Ta,O,-SiO, interface has been increased to Qi - C,* I’,,,. Con- necting the sample to the source-drain follower, the corresponding shift in the measured source voltage is - (C,/C,)* Vst,. 4. Photoconduction in Ta,O, Layers Many different methods for the preparation of Ta,O, layers have been considered, and for some of these layers photoconduction has been ob- served [2-41. In A&O3 and S&N4 layers similar effects have been observed [5,6]. It is generally agreed that photoconduction in insulators like Ta,O,, A&O3 and S&N, is caused by photoionization of initially neutral traps, lo- cated between valence band and conduction band, and accompanied injection of electrons in the conduction band. The trap depth may however be different, depending on the preparation method. For TazOS samples prepared by different recipes, values from 2.1 to 3.9 eV have been found for the trap depth [2-41. To investigate whether the pres- ence of these traps and their depth is determined by the fabrication method of the Ta,O, layers only, or also by the presence of a surrounding electrolyte, some other samples have been fabri- cated and measured. Of MTOS samples, realized as described in Section 2, the 1 pm thick Al gate was etched, except for a 10 pm wide edge around the gate. Then a 10 nm thick layer of Al, which has a negligible absorption for visible light, was de- posited on the gate region. These samples have been indicated as M,TOS samples. The measured source voltage as a function of bias-stress voltage for these samples is given in Fig. 4. Note the different scale as compared to Fig. 3. In a second experiment the 10 nm thick Al of the M,TOS samples was removed by wet etch- ing, yielding again chemical sensitive devices, indi- cated as ETOS* samples. The pH response of these samples appeared to be 55 mV/pH. How- ever, on performing bias stress experiments with these samples a behaviour was observed that is similar to that of an M,TOS structure, as drawn in Fig. 4. Finally it has been determined that for ETOS* and M,TOS samples the measured source voltage shift is not due to optical radiation, because the same curve as drawn in Fig. 4 has been obtained for bias-stress measurements performed on sam- ples in a dark environment. Comparing the results of Figs. 3 and 4 it can be concluded that the threshold voltage shift in ETOS samples is about 30 times larger than in ETOS* and M,TOS samples, and thus is of quite different origin. The light source radiation is in the visible range, with a photon energy of 1.6-3.2 eV. This means that the trap depth in ETOS samples is less than 3.2 eV, and in M,MOS and ETOS* samples is more than 3.2 eV. Due to the similar behaviour of ETOS* and M,TOS samples the lower trap depth in ETOS samples is not caused by ions in the contacting electrolyte. Therefore it can be concluded that the trap depth is influenced by the preparation method. As mentioned in Section 2 ETOS samples are realized in almost the same way as MTOS samples. The only difference is that during the Al anneal, the gate region of MTOS samples is covered with Al and the gate region of Fig. 4. Measured source voltage of M,TOS samples as a function of applied stress voltage, after exposure to optical radiation. 353 ETOS samples is not. Due to the fact that ETOS* samples are made by etching the Al gate of origi- nally MTOS samples, the preparation method of ETOS and ETOS* samples is also different. It seems that the application of a low tempera- ture treatment in N, in the presence of an Al layer on top of the Ta,05 can anneal traps with a depth less than about 3.2 eV in this layer. This conclu- sion is in agreement with the observed dependence of trap depth in a range 2.1-3.9 eV on the prepa- ration method [2-41. Similar effects have been observed in MOS structures with respect to states at the Si-SiOz interface [I, and in A1203-Si02 ISFETs for the long-term drift [8]. Acknowledgements The assistance provided by J. G. Bomer and E. Erkelens is gratefully acknowledged. References 1 M. Klein, Time effects of ion-sensitive field-effect transistors, Sensors mrd Actuators, 17 ( 1989) 203-208. 2 J. H. Thomas III, UV-stimulated photocurren t spectroscopy and trapping kinetics of a 2. I-eV trap in anodic Ta,O, tilms, J. Appl: Phjs., 45 (1974) 835-842. - _ - 3 F. M. Namr. M. Y. Zaheer and W. H. Bokhar. Photocon- duction in adodic tantalum oxide 8lms, Znt. J. electron., 54 (1983) 447-452. 4 S. Seki, T. Unagmi and B. Tsujiyama, Electron trapping levels in RF-sputtered Ta,O, tilms, J. Vat. Sci. Technol. A, l(l983) 1825-1830. 5 H. Kliem, R. Schmidt and Cl. Arlt, Charge protlle in thin layers of Al,O,, J. Appl. Phys., 53 (1982) 1590-1595. 6 S. B. Bibyk and V. J. Kapoor, Photoionization cross section of electron traps in silicon nitride films, J. Appl. Phys., 52 (1981) 7313-7316. 7 N. M. Johnson, D. K. Biegelsen and M. D. Moyer, Low- temperature annealing and hydrogenation of defects at the Si-SiO, interface, J. Vat. Sci. Technol., 19 (1981) 390-394. 8 H. H. van den Vlekkert, Some fundamental and practical aspects of CHEMFETs, Ph.D. Thesis, University of Neu- ch&tel, 1988, Ch. 4. 

Charge protlle in thin layers of Al,O,,

Electron trapping levels in RF-sputtered Ta,O,

Lowtemperature annealing and hydrogenation of defects at the Si-SiO, interface,

Photoconduction in adodic tantalum oxide 8lms,

Photoionization cross section of electron traps in silicon nitride films,

Some fundamental and practical aspects of CHEMFETs,

Thomas III, UV-stimulated photocurren t spectroscopy and trapping kinetics of a 2. I-eV trap in anodic Ta,O,

Time effects of ion-sensitive field-effect transistors, Sensors mrd Actuators,

https://doi.org/10.1016/0925-4005(90)80228-R

Photoelectric effects in Ta2O5SiO2Si structures

Photoelectric effects in Ta2O5SiO2Si structures

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