Exploring Energy-Efficient Reconfigurable Architectures for DSP Algorithms

Abstract

Future hand-held multimedia terminals require a very high performance on a very small energy budged. Such devices can only be realized if their entire system is energy cognisant. In this paper a reconfigurable systems-architecture for mobile multimedia systems is introduced. The Field Programmable Function Array (FPFA) is discussed in detail. Several digital signal processing algorithms are discussed and mapped on the FPFA. Also,the power radius theory about low-power design is introduced