Since 2004 Imperial College has been developing the world’s first application-specific
instrumentation aiming at the on-line, in-situ, physiochemical monitoring of adult stem
cell cultures. That effort is internationally known as the ‘Intelligent Stem Cell Culture
Systems’ (ISCCS) project. The ISCCS platform is formed by the functional integration
of biosensors, interfacing electronics and bioreactors. Contrary to the PCB-level
ISCCS platform the work presented in this thesis relates to the realization of a miniaturized
cell culture monitoring platform. Specifically, this thesis details the synthesis and
fabrication of pivotal VLSI circuit blocks suitable for the construction of a miniaturized
microelectronic cell monitoring platform. The thesis is composed of two main parts.
The first part details the design and operation of a two-stage current-input currentoutput
topology suitable for three-electrode amperometric sensor measurements. The
first stage is a CMOS-dual rail-class AB-current conveyor providing a low impedancevirtual
ground node for a current input. The second stage is a novel hyperbolic-sinebased
externally-linear internally-non-linear current amplification stage. This stage
bases its operation upon the compressive sinh−1 conversion of the interfaced current
to an intermediate auxiliary voltage and the subsequent sinh expansion of the same
voltage. The proposed novel topology has been simulated for current-gain values ranging
from 10 to 1000 using the parameters of the commercially available 0.8μm AMS
CMOS process. Measured results from a chip fabricated in the same technology are also
reported. The proposed interfacing/amplification architecture consumes 0.88-95μW. The second part describes the design and practical evaluation of a 13.56MHz frequency
shift keying (FSK) short-range (5cm) telemetry link suitable for the monitoring of incubated
cultures. Prior to the design of the full FSK radio system, a pair of 13.56MHz
antennae are characterized experimentally. The experimental S-parameter-value determination
of the 13.56MHz wireless link is incorporated into the Cadence Design
Framework allowing a high fidelity simulation of the reported FSK radio. The transmitter
of the proposed system is a novel multi-tapped seven-stage ring-oscillator-based
VCO whereas the core of the receiver is an appropriately modified phase locked loop
(PLL). Simulated and measured results from a 0.8μm CMOS technology chip are reported
