The influence of the main source of errors in Switched-Current (SI) filters over the performance of Wave Analog Filters (WAE) is evaluated. Models of mismatching and clock-feedthrough (CF) are deduced for basic building blocks, and applied to study the sensitivity of a third-order filter. Monte Carlo simulations performed using a behavior simulator prove that CF are dominant over mismatching effects

Huertas, José Luis

Rueda Rueda, Adoración

Yúfera García, Alberto

idUS. Depósito de Investigación Universidad de Sevilla

317 A study of the sensitivity of switched-current wave analog filters to mismatching and clock-feedthrough errors Albert0 Yliferat*, Adoracibn Rueda* and Jose Luis Huertas) Dpto. de Tecnologia Electrcjnica, Universidad de Sevilla. *Dpto. de DiseAo de Circuitos Analdgicos, Centro Nacional de Microelectrcjnica, Edificio CICA, Avda. Reina Mercedes s/n, 41012-Sevilla Tf (95) 462 38 11 yufera@cnm.us.es ABSTRACT The influence of the main source of errors in Swilched- Current (SI) filters over the performance of Wave Analog Filters (WAF) is evaluated. Models of mismatching and clock-feedthrough (CF) are deduced for basic building blocks, and applied to study the sensitivity of a third-order filter. Monte Carlo simulations performed using a behavior simulator prove that CF are dominant over mismatching ef- fects. INTRODUCTION Two different approaches have been explored for switched-current (SI) low-sensitivity filter realizations; both simulate passive LC ladder structures. One follows the well- known synthesis methodologies applied for switched-capac- itor filters, hence requiring SI integrators as building blocks [l-31. The other is based on simulating Wave Digital Filter In addition to excellent passband sensitivity properties. WAFS have two inherent advantages. They are based on the bilinearmapping and involve very regular and simple circuit elements. We have already proved the feasibilily of this ap- proach, obtaining SI WAF prototypes 14-61. An important property of SI WAF is that the range of current gain values in any adaptor does not greatly differ bclwecn one filter function and other. This paper deals with the study of mismatching and CF in- duced errors, that, will allow us to derive design rules for minimizing their influence in WAF. A statistic model is pro- posed for the study of random mismatching errors in SI im- plementations of WAF (systematic mismatching errors arc assumed cancelled by an appropriated design of the basic cells), and a statistic sensitivity measure is carried out for a low-pass filter using this model and Monte Carlo simula- tions. On the other hand, the sensitivity to CF induced error is studied using a simple model for charge injecllon in [he (WDF) structures [4-61. basic memory ccll. All is made at a behavioral level oriented to a rapid dcsign validation before going to the physical re- alization, but with models which are related to this physical realization. The developed models have been introduced in WAVER, an in-house program we use to design SI wave an- alog filters. The simulation results obtained for a low-pass third-order filter will be presented. REALIZATION OF SWITCHED-CURRENT WAF Let us consider the implementation of a third order low- pass filter. The Wave Model shown in Figure 1 is one of the modcls we can use to realize the filter. The signals A i  and R,, represent the incident and reflected wave signals in the j Figure I :  Third order low-pass wave filter. adaptor. The cocfficicnts y, must be determined taking into :iccount Ihc following relationships c y . , = - 7  , ROjYOj = R,jY,j = R,jY2j (1) , = O  'J where the port resistance R2, and RZ1 can have any value and the other resistances are obtained from the LC reference filter and the sampling frequency [4]. Equations for the 3-port parallel adaptor operation are B .  J = A, , , -A J , A, = yoAo + y l A l  + y2A2 (2) wilh j = O , l 2 .  Switched-current implementation of the filter consists of Ihc interconnection of current modeadaptors and uni l  delay cells. Note that any reflection coefficient yi, is re- alizcd as i~ current mirror gain. The schematic in Figure 2 is 318 a simplified version. Using high-swing cascode current mirror (Fig. 3) input-output coupling impedances effects can be Feduced Figure 2: Simplified schematic for a 3-pO1-t parallel adaptor. Figure 3: Simplified schematic for a delay cell. Figure 4: Basic current mirror. . MODEL FOR MISMATCHING ERRORS To study transistor mismatch effects in the openlion of the proposed adaptors we have used the model given in [71 for the random variations in current mirror gains produced by the variations in the fabrication process. For the simple current mirror in Figure 4. the relative variance in the error between the current 12 and the input I, is calculatcd. If  unit transistor cells are used. systematic error due to AW and AL can be reduced, leading to the expression for random mis- matching errors (3) where NI and N, are the number of unit cells in MI and M2 [8]. From the technology parameters in  [7]. and using (W/ L)1=(60pn/10pm) and ( V G ~ , - V ~ , ) = O . ~ V .  the error evaluat- ed by (3) is about 0.28%. To obtain the variance in the out- put currents of any adaptor, we define the relative variance in the unit-gain current mirror as (4) Regarding the ratio ldli,,, mismatching in the NMOS mir- rors lead to offset and gain errors, given by ( 5 )  (6) 2 Gg2n,of~fo) = 0'.(I) ' I B ot2 2 n,ga in ( fo )  = 0' Errors from the PMOS bias transistor generate only offset in I,. where ~ ' ~ ( 1 )  has been define as (4) for a PMOS current mirror. Taking (W/L),=( 100pm/lOpm) and (VGsp- V,,)=O.SV, the error evaluated by ( 5 )  for PMOS transistor is about 0.3%. Global mismatching error contribution can be obtained adding equations (5) to (7). The variance associated to the actual realization of each fil- ter component (delay cells and adaptors) can be evaluated as follows. First, determine the number of current mirrors and fheir respective gains in the path from each input to one oulput. Second. assuming the mismatching error in each mirror modellcd as a gaussian distributions which is not correlated with the error in other mirror, add all errors in cach input-output path. Using this procedure, the gain and offset variance in the cascade of two unity-gain current mirrors are given by (8) (9) =,2 ga1,#(2) = 2OV2,(1) ~ $ 2 )  = (40 '3  1) + 2 0 ' 3  1)) . 1's which can be used to evaluate the error in unit delay cells, o2(,-') = a2(2). For the case above (8) and (9) give a 0.4% gain crror and 73nA random offset. The statistic model corresponding to the 3-port parallel in Fig 2 is obtained in the same way, resulting in a gain vari- ance matrix error with entries given as, From ( I O )  it can be seen that miimatching errors are more important when y approaches zero. This effect can be taken into account in the design phase by implementing low-val- ued cocfficients with an arrangement of current mirrors whose total gain is given by (I +?)-I. Thus, alternative ma- trix cnlrics of  (9+1/( l + ~ ) )  or (7+1/( l + ~ ) )  appear. This solu- tions means a penalty area. As illustration, let us consider thc malrix variance corresponding to the first adaptor in Figurc l(b), for the particular values yo=0.3 y1=1.187 and y2=0.5 13, form ( IO)  we obtain (11) 319 A L ' ~  / t ~ V l  0 1 ~,,~,,,~[ilB] 0.2211 0.3322 which means that the maximum standard deviation corre- sponds to the ('yo-1) gain, and i t  is equal to 0.57%. The ma- trix for output offset errors is given by. 5 1 .I344 As before, for small ccefCicients realized as (l+y)-l ,  thc number7 and yin (12) must be changed for (7+4) and (I+?), respectively. The offset for the example presented is 186nA. The same can be done for all adaptors in the filter. CLOCK-FEEDTHROUGH INDUCED ERRORS Clock-feedthrough in current track-and-hold (T/H) can be modelled by an error voltage on the data holding node. It causes DC offset, gain error and distortion. Although addi- tional circuitry for cancellation of the CF errors is always used, total cancellation is not reached i n  practice. We havc introduced a simple analytical model to study the effects of this error in the global performance of the filter. Assuming a voltage error Avfin the holding node, the equation includ- ing CF effects will be for the unit  delay cells where AIo repiesents the output current error evaluated at the nT instant, fin the input current at the ( ! I - /  17' instant and 0 = &A v/-. In order to find a linear modcl Tor CF error. (13) can be approximaied as where only the two first terms in  RHS are taking into ac- count for a linear model. Io = bo + b ,  . lin + b, . l;,, + . . . (14) SIMULATION RESULTS Errors can be introduced in numerical simulations per- formed by WAVER using the computation expressed as Io = Iin (y + A yO) + lop in which the ideal output, fl,,,. is modified by an error gain Af and addcd to an offset term. fop We have performed a Monte Carlo analysis of the filter in Figure 1 with the nominal adaptor coefficients given i n  Table I corresponding to a normalized cutoff-frecluency of 0.09577 and a passband ripple of 0.2 dB, using I,=lOpA and lOym/lOym unit transistors. Mismatching errors are randomly generated using the standard deviations derived from (8) and (9) for the delay cells, and from (10) and (12) for the parallel adaptors. CF errors are included given a val- ue to A y .  For the characterization of the filter. we have measured the parameters defined in  Tablc 11. Table I: Three-port adaptor coefficients Table 11: Statistical filter parameters definition. (E) rip- ple, (wo) cutoff-frequency, (H(0)) DC level and (H(0.5)) Niquist level. I I 1 1 1 - C H(0.5)  N n  = 1 .  .... N I I I E $ , ~ [ % ]  I 11.69 I 16.27 I 8.40 I Figure 6(3) shows the effects of positive and negative gate voltage increment in the T/H cells. The corresponding ex- perimental results are shown in Figure 6(b), which were ob- tained modifying the clock signal level. The displacement in the experimental filter function correspond to be the ef- fects of the CF of opposite sign. To exploit the freedom in the choice of adaptor coefficients inherent to WAF [ 6 ] ,  we have also measured the effects of the ratio k=y20/yoo values on the error in the ripple and the cutoff rrequency relative to the nominal ones. The obtained results arc illustrated in Figures 7 (a) and (b), Note that there exist values of k which produce low deviations in the I'i I IC  r c h a  r;Ic tc ris t i c s. 320 45.0 I Frequency (normalized) Figure 5: Magnitude response obtained from Monte Carlo simulation for Avy=SmV. 0.75 mean ( I  mV) mean (-lmV) 0.10 Frequency (normalized) 0 0.3 .W 9 $ .- E M 9 -0.7 0 Frequency (normalized) 0. lo  (b) Figure 6: (a) Pass-Band magnitude response obtained from Monte Carlo simulation with Av@ImV. (b) Experi- mental results for different clock signal levels. CONCLUSIONS The sensitivity of SI WAF filters to the main sources of errors has been evaluated using operational models and Monte Carlo simulations. The results are close to the exper- imental measurements and prove that CF effects are c'omi- nants. Future work would be focused on including non-lin- ear terms in order to obtain a whole filter characterization. I 5 .O 10.0 15.0 20.0 k (a) 4.5 t ~~ "'"0 5.0 10.0 15.0 20.0 k (b) Figure 7: Evolution of (a) ripple and (b) cutoff frequency errors for different values of k = y z $ y ~  and Avf=lmV. REFERENCES [ I ]  J. B. Hughes. I. C. Macbeth and D. M. Patullo: "Swit- ched Currents Filters". Proceedings IEE VOL. 137, [2] T. S .  Fiez., D. 1. Allstot. "CMOS Switched-Current Ladder Fillers". IEEE JSSC. VOL SC-25, N"6. pp. [3] T. S .  Fiez., D. J .  Allstot: "Switched-Current Circuit Design Issues". lEEE JSSC, VOL SC-26, N"3, pp. 141 A. Rueda. A. Ylifera and J.L. Huertas : "Wave Analog Filters Using Switched-Current Techniques". Electro- nics Letters,VOL-27, N"16.pp.1482-1483, Aug. 1991. [SI A. Ylifera. A. Rueda. J.L. Huertas :"Switched-Current Wave Analog Filters". ISCAS'92, pp.859-862. 1992. 161 A. Ylifera. A. Rueda. J. L. Huertas, "Programmable Switched-Current Wave Analog Filters". ESS- [7] M. J .  M. Pelgrom, A.J. Duinmaijer, A. P. G. Welbers, "Matching Properties of MOS Transistors", IEEE [8] J. B. Highes and W. Redman-White: "Switched-Cu- rrent Limitations and Non-Ideal Behaviour". Chapter 4 in SWITCHED-CURRENTS: an analogue techni- que for digital technology, Peter Peregrinus Ltd., Eds. C. Toumazou, J. B. Hughes and N. Battersby, 1993. Pt. G. No 2. pp. 156-162. AV. 1990. 1360- 1367, DCC. 1990 192-202. Mw. 199 1. CIRC'93. pp.174-177. Aug.1993 JSSC, VOL. SC-24, N.5, pp. 1433-1444, Oct. 1989. 

A study of the sensitivity of switched-current wave analog filters to mismatching and clock-feedthrough errors

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A study of the sensitivity of switched-current wave analog filters to mismatching and clock-feedthrough errors

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