The application of GaAs field effect transistors in digital circuits requires a valid description by an equivalent circuit at all possible gate and drain bias voltages for all frequencies from DC up to the gigahertz range. An equivalent circuit is presented which takes into account the gate current of positively biased transistors as well as the symmetrical nature of the devices at low drain voltages. A fast method of determining the elements of the equivalent circuit at all bias points without frequency limitations is presented. Direct computation from analytical expressions, without iteration, allows this parameter extraction procedure to be used for real-time on-wafer parameter extraction. Large-signal calculations are possible by inserting the voltage dependences evaluation for the elements into suitable simulation programs, such as SPICE

Berroth, Manfred

Bosch, Roland

Online Publikationen der Universität Stuttgart

224 IEEE TRANSACTIONS ON MICROWAVE THEORY ANOTECiiNIQUES. VOL. 39. NO.2, FEBRUARY 1991 
High-Frequency Equivalent Circuit of GaAs 
FET's for Large-Signal Applications 
Manfred Berroth and Roland Bosch 
Abstract - 'l'lte .applicallon of GaAs field effect transistors in digital 
circuits requires a vaild description by an equivalent circuit at all 
possible .;ate arid dl'ain bias voltages for all frequendes from de up to 
lbe GHz ra4ge. This paper describes an equivalent circuit which takes 
into account ihe galt current of positively biased transistors as well as 
lbe symme~rical natun of lbe devices at low drain voltages. A fast 
method to determine the elements of tbe equivalent circuit from mea· 
sured S parameters b presented which delivers for the first time very 
good agreement for all ope.rating points. 
I. INTRODUCTION 
THE grtlwing fteld of GaAs MESFET and MODFET appli~ations requires the development of circuit simula-
tion inodels. For MMIC designs, small-signal equivalent cir-
cuits of the type shown in Fig. I have been used up to 60 
GHz [1], [2). Recently developed MODFET's with very high 
transit frequencies have threshold voltages of about 0 V [3). 
The operating point for maximum transconductance and 
highest transit frequency is at a positively biased gate. How-
ever, at these bias points the gate current cannot further be 
neglected. Another problem occurs in switching applications, 
when the drain-to-source voltage of the field effect transistor 
(FET) comes close to 0 V. In this case the symmetrical 
nature of the physical device has to be reflected in the 
equivalent circuit. A physically meaningful small-signal 
equivalent circuit including these features is not only an 
important tool for circuit design; it will also give important 
hints for device fabrication and improvement. We propose 
an extended equivalent circuit together with a fast method to 
determine its elements from S-pararneter measurements for 
all operating points and without frequency limitations. Only 
an equivalent ci rcuit which describes the transistor at all bias 
points precisely can be used to evaluate the bias depen-
dences of the intrinsic circuit elements. This is essential for 
large-signal applications. 
II. THE SMALL-SIGNAL EQUIVALENT CIRCUIT 
A complete small-signal equivalent circuit is shown in Fig. 
2. The circuit is divided into the external part, with eighl 
parasitic elements, and the intrinsic device, containing n.ine 
elements defined by ten variables (gm = lgmle-iw'). All ex-
ternal elements are considered to be constant for all operat-
ing points. All intrinsic elements depend on the applied gate 
and drain voltages. For operating points with positive gate 
bias, the differential resistances of the gate-to-source and 
Manuscript received January 16, 1990; revised August 14, 1990. 
The authors are with the Fraunhofer Institute for Applied Solid State 
Physics, D-7800 Freiburg, Germany. 
IEEE Log Number 9041079. 
gate-to-drain diodes are modeled by the resistances R fs and 
R fd· To ensure a smooth transition from the symmetric "cold 
model" [1), [21 [4) to operating points in the saturation 
region, the resistor Rdg is included. At low drain voltages, 
the gate-to-drain capacitance is about the same as the gate-
to-source capacitance, and the series resistances R; and Rgd 
determine the real parts of Y11; and Y12; respectively. 
Our method to extract the element values from S-parame-
ter measurements is similar to [1] and [5] but is applied to 
the extended circuit. Furthermore the frequency iimitations 
of (1] and [5) have been overcome by a fully analytic solution 
of the intrinsic Y-parameter equations as in [7] for the circuit 
of Fig. L First, the external parasitic elements have to be 
determined by so-called cold modeling at a drain-to-source 
voltage of 0 V, as described in [!], [2], and [4]. Then " hot" 
measured S parameters (Vrls > 0 V) arc de-embedded from 
the external parasitic elements to obtain the equivalent Y 
parameters of the intrinsic device. The measured S parame-
ters are converted to the corresponding Y and Z parameters 
by well-known transformations. 
Thereafter a fast procedure is applied to determine all 
voliage-dependent elements of the equivalent circuit at each 
operating point using an analytic solution of the Y-parameter 
equations of the intrinsic device. This parameter extraction is 
referred to as hot modeling. Detailed descriptions of the 
methods used in the cold and hot modeling processes arc 
given in the following sections. 
III. COLD MODELING 
For cold modeling, all S-parameter measurements are 
carried out at 0 V drain-to-source voltage. In this case the 
transistor is a nonlinear symmetric device. The parasitic gate, 
source, and drain resistances and inductances are deter-
mined first at a far positively biased gate. At these bias 
points. the following simplified equations, given in [1), are 
valid: 
(1) 
(2) 
(3) 
Rc is the channel resistance at the applied gate voltage and 
nkT I qlg is the differential resistance of the Schottky diode. 
As there are four unknown resistors and only three equa-
0018·9480/ 91 / 0200-0224$01.00 © 1991 IEEE 
BERROTH AND BOSCH· HIGH·~RE.OUENCY EQUIVALENT CIRCUIT OF ClaAs FErs 
INTRINSIC DEVICE 
r--------------., 
I 
I 
I 
Cgd I 
I 
I 
cds 1 
I 
I 
I 
L------ _______ .J 
FiJ. l. Small·sicnal equrvalent c•rcu11 of a field effect transistor (I~ 
INTRINSIC DEVICE 
r - - - - - -R,d- - - - - - - ., 
I I 
I C¢ I 
L--- -----
l dsl 
I 
I 
I 
_____ .J 
-=s 
0 
Fia. 2. Extended small·s•cnal equ•valent circu11 of a field effecltransislor includinc aa1e current and re,tSil\e feedback. 
lions with correspondtng real parts, one addit ional relation is 
required. We use a method similar to that in [6] to determine 
the sum of R, and Rd from S-parameter measurements. 
The three inductances are calculated from the imaginary 
parts of these equations without making additional assump-
tions. 
below pinch-off using the foUowina simplified equations [1]: 
The gate and drain pad capaci tances cp. and cpd can be 
extracted from S-parameter measurements at gate voltages 
lm(Y11 ) jw(Cpg +2Cb) (4) 
lm(Y12) • lm(Y21 ) • - jwCb 
lm ( y22)- jw( cb + cpd). 
(5) 
(6) 
cb is the residual coupling capacitance from the gate to the 
source and drain region. 
226 IEEE TRANSACnONS ON MICROWAVE 11-IEORY AND TECHNIQUES, VOL.. 39, NO.2, FEBRUARY 1991 
An alternative method is to use transistor designs on the 
same wafer without active area. From this passive structure, 
the gate and drain pad capacitances, CP8 and Cpd• are 
derived from measured S-parameter data of those metal 
structures by means of (4) to (6). 
IV. HoT MoDELING 
The measured S-parameter data can be transferred to the 
corresponding Z and Y parameters for any bias and fre-
quency. By means of these transformations, the S-parameter 
data can be de-embedded from the parasitic external ele-
ments, as shown in [1]. The intrinsic device (Fig. 2) can be 
described by the following four complex Y-parameter equa-
tions: 
w
2
R ;Cis w2R8 dC'ff,1 . ( C8, C8d) 
Yu;= gfs +gfd+---r>! + D2 +Jw Dl + D2 
(7) 
(8) 
By separating these equations into their real and imaginary 
parts, eight circuit elements can be determined. However, in 
our equivalent circuit (Fig. 2) the intrinsic transistor is mod-
eled by ten intrinsic variables. As additional relations for the 
differential resistances R1, and R fd• either de measurements 
or S-parameter measurements at very low frequencies can be 
used. As can be seen from (7) and (8), the real parts of the 
intrinsic Y parameters Y11; and Y121 diminish at low frequen-
cies, with the exception of g fs and g fd· The differential 
conductances of the gate diodes, g fs and g fd• can therefore 
be determined at each operating point at low frequencies, 
e.g. 50 MHz, by the following equations: 
8fd= - Re(Y12;) {15) 
(16) 
At the same bias point the remaining eight parameters can 
be calculated for each measured frequency independently. 
After separating (7) through (10) into their real and imagi-
nary parts, the expressions for the elements of the' small-sig-
nal equivalent circuit turn out to be (see the Appendix) 
lm(Y121) ( ( Re(Y121)+ 8Jd)
2
) 
cgd = - I + 
w Im(Y12i) ( 17) 
Re(YI2;) + gfd 
R d=----....!."-
8 wC8dlm(Y121 ) 
_ lm ( Y11;) + Im (Y121) ( (Re (Yw) + Re(Y121)- g1s)2 ) c,, - I+ 2 
. w {Im(Y111)+Im(Y12;)) 
Re( Y11;) + Rc ( Y121)- 8fs R . =--~~~-~-~--~ 
' wC1 ,(Im (YIIi) + Im (Y121)) 
8m = V ((Re(Y21i) - Re(Y12;) ) 2 + ( Im( Yw)- Im ( Y121) ) 2)D1 
1 . ( Im(Y121 ) - Im{Y211) -wC~,R1{ Re(Y2u)- Re(Y121))) 
T =- arcsm 
W 8m 
lm (Y22;) + Im ( Y 12; ) C ds = __ _:_..::.::;.;._ _ _:___::;;;..:_ 
w 
8ds = Re(Y2u) + Re(Y12i) . 
( 18) 
(19) 
(20) 
(21) 
(22) 
(23) 
(24) 
Cme-i"'' . wC8d y21 ' = - g fd + - J -----''---
1 1 + jwR;Cgs l + jwRsdCgd (9) 
Equations (17) through (24) are valid 
i) for drain voltages greater than 0 V, 
w2R,dCid . ( Cgd) 
Y22i =gfd + 8ds+ D2 +JW Cd,+ D2 
where 
D1 = 1 + w2Ci,R T 
D2 = 1 + w2CJdR;d 
(10) 
(11) 
(12) 
(13) 
(14) 
ii) for positive and negative gate voltages, 
iii) for all frequencies for which the equivalent circuit is 
valid. 
As there are no time-consuming iteration loops in the hot 
modeling procedure, this method can effectively be used for 
on-wafer S-parameter measurements with real-time parame-
ter extraction. 
V. M EASUREMENTS AND R ESULTS 
Several differenl types of FET's have been investigated to 
verify our method and to compare it with the results of other 
procedures. We examined heterostructure FET's as well as 
MESFET's fabricated at our institute. The hot modeling 
BERROTH AND BOSCH: tUGH-FREQUENCY EQUIVALENT CIRCUIT OF Gai\> FET'• 227 
.. ueo am V611- 1.00 v 
~ t2.40 <lnl v,. 0.70 v 
""" 
4.211 (1m .... 757 rnA 
.... 1.21 am t-Q.05 - 2S.05 QU 
...... f1.12 (1m 
I 
lab sn 2.!!0 
CliP 35.. lab Sl2: 0.40 
~OM ~ QRi 11ft 
r- 1.71 pi 19" 50.00 11ft 
c,... 1S7.51 IF' 512 
RCI7 
cpzw IF' 
C6tl- 5.22 IF' 
(llr t2.70 IF' 0.0 Q.2 o.e 
~ 15,00 IF' ~ o.ee " 
~ 44.110 pH E12- 1.34 " 
I.PO.OOpH moo o.n " 
1.6- 23.50 pH ~ s,, E22- ().56 " ~ 4.33 ..aJO tt& 
~ W.4210m <btt 
«& e $ 
S-Porometer 
+ 
0 
meaued 
tlis pqlel' 
----- ref. [1] 
Fig. 3. Comparison of measured data of a 0.6 I-'m enhancement he terostruclure field effect lransistor (crosses) with 
simulation results of our procedure (circles) and the method pro posed in II I (solid lines) at positive gate bia.~. 
method, described in [1), is limited to frequencies below 
5 GHz, which is a severe limitation for present and future 
applications of GaAs FET devices. We compared the method 
described in [I) with our fully analytical approach up to our 
measurement limit, and the results shown in Fig. 3. The 
crosses indicate the measured S parameters of a het-
erostructure FET with pulse doped layers on both sides of 
the undoped channel with a gate length of 0.6 JLm. The gate 
and drain voltages were + 0.7 V and 1.0 V, respectively. The 
solid line represents the results of the method described in 
[ 1], and the circles show the results of our method. Obvi-
ously, our model yie lds better agreement with the measured 
data at high frequencies, showing that extrapolations of our 
model to higher frequencies are more reliable. The low error 
averages, £ 1i • of our improved model should be noted. 
Fig. 4 presents the intrinsic capacitances as calculated for 
the operating point given in Fig. 3. We can usc this plot to 
verify the validity of the equivalent circuit at high frequen-
cies. The equivalent circuit remains valid as long as its 
elements turn out to be independent of frequency, with the 
deviation from the mean value being an indication of the 
error of this element value. 
As a further example, Fig. 5 shows a depletion-type het-
erostructure FET with a gate voltage of 0.6 V and a drain 
voltage of 0.05 V. These low drain voltages occur in switch-
ing applications of FET's. Again, our proposed method 
(circles) neatly approximates the measured data, while the 
solid line according to [I) cannot fit in particular the S11 and 
sl2 data points. As the influence of the differential resis-
tances is not considered in [1], the method cannot be used 
for operating points with a significant gate current. 
200 
(f") 
~ 
150 
lO 
~ -------------
'-.....,_....__________________ C<lo 
I) '6 20 25 Gill) JO 
rr.......,. 
Fig. 4. The intrinsic capacitances c,,. CJ4 , and C4, versus frequency 
calculated at the same bias con itions as in Fig. 3. 
As the accuracy of our parameter extraction is high and 
the computation time is well under a second on a J.LVAX II, 
we can calculate the small-signal equivalent circuit elements 
at many operating points. Thus the bias dependences of all 
internal elements are quickly established. Owing to the valid-
ity of the equivalent circuit for all operating points, these 
voltage dependences of the equivalent circuit elements can 
be utilized for large-signal model development. The imple-
mentation of this model into SPICE will be reported else-
where. 
228 IEEE TRANSAcrtONS ON MICROWAVE THEORY AND TECHNIQUES, VOL 39, NO. 2. FEBRUARY 1991 
Ill- 12.20 11m 
Act- 11.20 11m 
llr 0.81 11m 
~ 2.52 11m 
Ap 1.41 11m 
'""" 1.02 
~ 1».53 IllS 
r- o.oo PI 
eg.. 1J5.J8 fF 
cp 72111 fF 
Cdloo IIS.4J fF 
cw-:s.e fF 
~II.OOff 
Lr 44.50 pH 
LPo5.00pH 
~ 25.20 pH 
Rftoo 3.11 '4m'lfJ 
lifo- \.34 '4m 
S- Parameter 
" 522 
~ s,, 
~~ ~ ~ 
VdP< o.o5 V 
VII"' G.aO V 
.... \15 ""' 
f-o.o5 - 25.05 Qlz 
,... S2t t50 
w. S12: om 
Lr o..e5 1111 
19- :i0.001111 
RG17 
En- t50 
" Efbo \2J 
" E2l- 2.11 
" E22- U4 " 
+ 
0 
,..,.eel 
!tis pqlel' 
----- ref. [1] 
Fig. 5. Comparison of measured data of a 0.6 J.Lm depletion heterostructure field effect transistor (crosses) with simulation 
results of our procedure (circles) and the method proposed in [I] (solid lines) at low drain voltages. 
VI. CoNCLUSION We can separate the real and imaginary parts: 
An extended small-signal equivalent circuit for GaAs field 
effect transistors is proposed. It includes the effects of the 
differentia l resistances of the gate-to-source and gate-to· 
drain diodes as well as the serial resistance of the feedback 
capacitance. A fast and accurate method to determine all 
elements of this equivalent circuit at all bias points without 
frequency limitations is presented. Direct computation from 
analytical expressions, without iteration, allows this parame-
ter extraction procedure to be used for real-time on-wafer 
parameter extraction. Large-signal calculations arc possible 
by inserting the voltage dependences evaluated for the ele-
ments into suitable simulation programs such as SPlCE. 
Km( cos( wT) - wR;Cgs sin ( W1')) 
Re(Y21i) = . 2 + Re(Y1u) i + (wR;C~:,) 
APPENDIX 
With the exception of Km and ,., all circuit variables can 
be determined by simple algebraic operations. To solve for 
g, and ,. we have to use (9): 
which can be rewritten as 
g,.(l- jwR;C8s)( cos(w,.) - jsin ( wT)) 
y2li = 2 + yl 2i· 
1+(wR;C1.) 
(A2) 
+ lm(Y12; ). 
For simplification of the notation, we use 
Then we get 
R = Re( Y21i ) - Re (Y12i ) 
I = lm(Y21;) - lm(Y12; ) 
t/J = wT 
b = taCg,R; 
g, 
a = I + b2 . 
R = a(cos<f>- bsint/J) 
1 = - a(b cost/J + sin t/J) 
This can be written as 
R 
cos t/J = - + b sin <P . 
a 
Now we can solve for t/J: 
- 1- bR 
sin <b = ( 2 ) . a l + b 
(A3) 
(A4) 
(AS) 
{A6) 
(A7) 
(A8) 
(A9) 
(AIO) 
(AlI) 
{Al2) 
(A13) 
BERROTH /\NO BOSCII: HIGH-FREQUENCY EQU IVALENT CIRCUIT OF GaAs FET's 229 
Inserting (Al3) into (AIO) and using cos d> = .jJ - sin2 tP yields 
a = (AI4) 
By resubstitution, we get g'" and T: 
g, - ~ (( Re( Y211 )-Re ( Y12,)) 2 + ( Im ( Y21,) - 1m ( Y12,))2)Dl (A15) 
1 • ( lm (Y12,) - Im (Yw)-c.~C1,R,( Re(Y21 ,) - Re(Y1z;))) r- - ~~ . 
W Bm 
(Al6) 
ACKNOWLEDGM ENT 
The authors would like to thank Dr. W. H. Haydl and Dr. 
V. Hurm for stimulating discussions of this work as well as 
Mr. W. Benz for assistance in de measurements. Thanks are 
also due 10 our colleagues who prepared and fabricared rhc 
samples. 
REFERENCES 
[I) G. Oambrine, A. Cappy, F. Heliodore, and E. Playez, "A new 
method for determining the FET small-signal equivalent circuit," 
1£££ TratLf. Microwa1't! 'nu:ory Tech., vol. 36, pp. 1151-1159, 
July 1988. 
[2) W. R. Curtice and R. L Camisa, "Self-consistent GaAs FET 
models for amplifier design and device diagnostics," /£££ Trans. 
Microwa1't! 'nreory Tech~ vol. MIT-32, pp. 1573-1578, Dec. 
1984. 
(3) Loi D. Nguyen tt a/., " lnOuence of quantum-well width on 
device performance of Al o.JOGa 0_70Asj ln 025Gao_,5As (on GaAs) MODFETs," IEEE Trans. Electron Det'ices, vol. 36. pp. 
833-838, May 1989. 
(4) T.·H. Chen and M. Kumar. "Novel GaAs FET modelling tech-
nique for MMIC$,"' in 198$ GaA.s /C Symp. Tech. Dig. (Nash· 
ville), Jliov. 1988. pp. 49-52. 
[51 R. A. Minasian, "Simplified GaAs MESFET model to 10 GHz," 
Electron . J.e11 ., vol. 13, no. 8, pp. 549-551. 1977. 
[6) P. L. Hower ;Jnd N. G. Bechtel, "Current saturation and small-
signal characteristics of GaAs field effect transistors." 1£££ 
Trans. Electron Decices, vol. ED-20, pp. 2J3-220, Mar. 1973. 
171 M. Bcrroth and R. Bosch. "Uroad-band determination of the 
FET small-signal equivalent ci rcuit," IEEE Trans. MicrowaL'e 
Tlrrory Teclr., vol. 38, pp. 891- 895, July 1990. 
Manfred Berroth was born at Obersontheim, 
West Germany, in 1956. He received the 
Dipl.- lng. degree from the University of the 
Fedewl Armed Forces, Munich, in 1979. 
He then developed microprocessor systems 
and dedicated image processing software as a 
consu ltant. In 1987, he joined the Institute 
for Applied Solid State Physics, in Freiburg, 
Germany, where he is currently engaged in 
the development of circuit simulation models 
for GaAs field effect transistors as well as 
integrated circuit design. 
Roland Bosch was born in Stuttgart, Ger-
many, on April 7, 1937. He studied at the 
Technical University of Stuttgart and the 
Albert Ludwig University of Freiburg. Ger· 
many. and received !he Diplom-Pbysiker de· 
gree in 1964. 
Since then he has been employed at the 
Fraunhofer-Jnslilute for Applied Solid-Stale 
Physics. Freiburg, Germany. He carried out 
theoretical and experimental work on the 
Gunn effect in GaAs and subsequently was 
engaged in making l nP Gunn diodes for millimeter-wave applica· 
lions. Currently he is involved in GaAs microwave FET and MM!C 
research and development projects. His work focuses mainly on 
microwave measuremenrs of active and passive components and on 
tht: evaluation of equivalent circu its. 


High-frequency equivalent circuit of GaAs FET's for large-signal applications

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High-frequency equivalent circuit of GaAs FET's for large-signal applications

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