Abele, P.

Schad, K. -B.

Schumacher, H.

Sönmez, E.

Trasser, A.

English

AMS Acta

High Power Ultra Compact VCOwith Active Reactance Concepts at 24 GHzE. Sönmez, A. Trasser, K. -B. Schad, P. Abele and H. SchumacherDept. of Electron Devices and Circuits, University of Ulm, D-89069 Ulm, Germanyesoenmez@ebs.e-technik.uni-ulm.de 	Extremely compact layout and cir-cuit design techniques have been applied to com-mercially available Si/SiGe hetero bipolar transistor(HBT) MMIC technology. An ultra compact voltagecontrolled oscillator with a high output power has beenrealized, addressing the ISM band at 24 GHz. Ac-tive reactance concepts have made it possible to realizethe layout of this MMIC on an ultra compact area of300  300  m. The voltage control has been providedby a voltage tunable active inductance. To reduce os-cillator pushing, a cascode buffer has been added. Anoutput power of +1 dBm at 24 GHz has been achieved.I. INTRODUCTIONAs the cost of analog microwave or millimeter-wavefront-end electronics becomes a major factor at increasedfrequencies of operation, the reduction of the chip areais of prime importance in order to address the low-cost,consumer-oriented market at elevated frequencies. In [1]an integrated ultra compact oscillator design at based on a Clapp oscillator core [2] has been presented,where the typically used on-chip spiral inductance hasbeen replaced by an active inductance.This work describes a voltage controlled oscillator,which is based on [1]. The voltage control has been real-ized by a voltage tunable active inductance. The oscillatorcore is followed by a buffer amplifier stage in order to iso-late the VCO core from the load impedance. The chosenactive component concept has enabled the realization ofthe VCO on an ultra compact area of ﬀﬁﬂﬃﬁﬀ m.II. VCO TOPOLOGYThe VCO core, using an active parallel resonance cir-cuit, is followed by a cascode buffer amplifier. A bufferamplifier with a high amplification in the frequency rangeof  !"# to get a high output power level is problematic.To be able to extract high power out of the oscillator corewithout the need for a high amplification stage, a VCOcore with active reactances has been chosen [1].The used models are a scalable MEXTRAM model forthe transistors (see [3], [4] and [5]) and scalable modelsfor the passive elements, describing the electrical behaviorof the on-chip transmission lines and capacitances.A. Active CapacitanceIn Figure 1 you can see the detailed circuit schematicof the active capacitance, which represents the core of aClapp-Gouriet circuit. The transistor T1 is the main tran-sistor, which provides in a certain frequency range a neg-ative resistance at its base terminal. T2 acts as a currentsource. At the collector terminal of T1, the circuit can beloaded. Negative impedance to the input terminal is gen-erated by capacitive feedback. The input impedance canbe approximately described by the equation [6]:$% &(' )+*-,.0/2131/5467.8:939/93;9/<The base-to-emitter capacitance of transistor T1 has tobe taken into account parallel to = 6 . Simulation resultsVccT2T1T3activeto amp.C2C1frominductanceFigure 1: Schematic of the active capacitancedo provide negative resistance to the input terminal from>"?@A#BDCE?@A. The circuit shows at the operation fre-quency of FG ?@#A a positive resistance of about GIH . Aninductance with negative resistance is needed for a posi-tive loop gain in the oscillator core.B. Active inductanceThe detailed circuit schematic of the tunable active in-ductance can be seen in Figure 2. T4 is the main transistor,providing a negative resistance to its emitter terminal. Theactive inductance is realized as a modified cascode ampli-fier with a capacitive feedback loaded at the base of thetransistor T6 in common emitter configuration. The re-sulting inductive value of this circuit can be controlled bythe potential at the base of transistor T4. Here, the basepotential is set by a simple voltage divider referred to thetuning voltage JLKNMPOﬀQ .The first approach to describe the active inductance isapplying the simplest RTSUWV2XZY B\[ model, neglecting ]PQ , ]^ ,_` and =ba ` , and assuming the transistors T4 and T6 havethe same size. The impedance to the terminal depicted inFigure 2 is derived as:cdfeﬀg5'6h2ikj6)./lnmNoqp6). /lmNopLrs.pWt ,where u , = awv and x are the transconductance of T4and T6, base-to-emitter capacitance of T6 and transmis-sion line inductance of the connection of transistor T4 toy`z`, respectively. Here, the circuit acts as an inductancefor {"= a|v\}6.p . Especially for the active inductance lay-VccT4T6T5toVcontrolcapacitanceactiveFigure 2: Schematic of the tunable active inductanceout parasitics have to be modeled and taken into accountaccurately. Because of the large signal operation condi-tion, the small signal approach can not describe the wholecharacteristics of the circuit. A large signal analysis likeharmonic balance takes into account the nonlinearities inthe transistors, from which the negative resistance of thecircuit can be derived to about ~# .C. Cascode topology buffer amplifierThe input impedance of the cascode buffer ampli-fier shown in Figure 3 is power matched to the outputimpedance of the active capacitance. The transistor T9is connected to the supply voltage via an external bias-T.The simulated power gain of the implemented buffer am-plifier at  !I is !WL .D. VCO SchematicThe circuit diagram of the VCO is completed by con-necting the output terminal of the tunable active induc-tance via an on-chip DC-block capacitance to the inputterminal of the active capacitance and loading the activecapacitance with the cascode buffer block, which can beseen in Figure 4.E. LayoutThe chip photography of the realized circuit can beseen in Figure 5. The application of active reactances inthe VCO design demands accurate knowledge and con-sideration of parasitic transmission-line-inductances. Thelayout process itself is an iterative one. Layout parasiticsVccT9T8T10fromoscillatorcoreoutFigure 3: Schematic of the buffer stage in cascode config-urationhave to be taken into account in the simulation of the cir-cuit shown in Figure 4. The results of the simulation arethen used to modify the layout of the circuit again.Vcc300µmGroundSignalGroundcontrolVFigure 5: Chip photography of the FG ?@A VCOF. ResultsThe VCO has been probed on-wafer, applying the coresupply voltage via a needle to the “V z ”-pad and thecontroll-voltage on the “V z2OKN-qŁ ”-pad, respectively. Theoutput is connected via a coplanar wafer probe and anexternal bias-T to the supply voltage. A maximum out-put power level of B F0 > YLI at FGW  ?@A has been mea-sured. The total attenuation of the measurement setup1has been determined to GYL . Therefore the actual outputpower can be estimated to  C YLI . An overall currentconsumption of ﬁ mA at a supply voltage of L  V hasbeen determined. The spectral output power can be seenin Figure 6. The phase noise is Bﬀ YWIP @#A at C  @Aoffset from the carrier, measured on wafer. However it is1ground-signal-ground probe, bias-T, coaxial cable and two intercon-nects2outbuffer amplifierVcc Vcontrolactive inductance active capacitanceFigure 4: Schematic of the complete VCObelieved to be dominated by low-frequency pick-up in theprobe needles.−70−60−50−40−30−20−10023.5 23.6 23.7 23.8 23.9 24.0 24.1 24.2 24.3 24.4Power / (dBm)Frequency f / (GHz)RBW=1MHzFigure 6: Spectral output of the VCO with an outputpower of ~# L LI at  !W # (not corrected for mea-surement losses)The results of the frequency respons can be seen inFigure 7. The control voltage is above the supply voltagebecause of the way of biasing the transistor T4 in Figure2 by a voltage divider. At V `z eN q !W V the transistorT4 and at V `z eN   L  V the transistor T6 of the activeinductance is in a soft-breakdown condition, respectively.III. CONCLUSIONUsing a mature commercially available Si/SiGe HBTprocess, an oscillator concept based on the Clapp-Gourietcircuit with a buffer amplifier has been realized. The in-ductance in the resonant circuit has been realized as a tun-able active inductance. The chip area of the VCO wasonly ﬁﬀ¡ﬀﬁ m ¢ . This reduction in chip area has beenenabled by the replacement of the spiral inductor by anactive inductance. Therefore high output power can be ex-tracted out of the oscillator core. An output power level of4£LI at  !I has been determined, addressing theISM-Band. In the future, work will concentrate on morecareful phase noise characterization and optimization.We envision the use of this robust and compact VCOdesign in extremely compact and cheap SiGe MMICs, e.g.23.523.623.723.823.924.04.0 4.4 4.8 5.2 5.6 6.0−10 −8 −6 −4 −2  0Frequency f / (¤GHz)Output Power / (¥dBm)Control Voltage / (V)FrequencyPowerFigure 7: Frequency response of the  !" VCO (notcorrected for measurement losses)for RFID, simple radar or close-range transponder appli-cations.IV. REFERENCES[1] E. Sönmez, P. Abele, K.-B. Schad and H. Schu-macher, “16 GHz Integrated Oscillator Design withActive Elements in a Production Ready SiGe HBTMMIC Technology,” EUMC, Paris, France, 2.-6. Oc-tober 2000.[2] M. Soyuer, J. N. Burghartz, H. A. Ainspan, K. A.Jenkins, P. Xiao, A. R. Shahani, M. S. Dolan, andD. L. Harame, “An 11-GHz 3-V SiGe Voltage Con-trolled Oscillator with Integrated Resonator,” IEEEJournal of Solid-State Circuits, vol. 32, pp. 1451–1454, September 1997.[3] E. Sönmez, W. Dürr, P. Abele, K.-B. Schad and H.Schumacher, “Parameter Extraction of SiGe HBTs fora scalable MEXTRAM Model and Performance Veri-fication by a SiGe HBT MMIC Actice Receive MixerDesign for 11 GHZ,” IEEE/MTT-S Silicon Mono-lithic Integrated Circuits in RF Systems, Garmisch-Partenkirchen, Germany, 26.-28. April 2000.[4] W. J. Kloosterman, J. A. M. Geelen and D. B.M. Klaasen, “Effective Parameter Extraction for theMEXTRAM Model,” Proc. of IEEE Bipolar/BiCMOS3Circuits nad Technology Meeting, Minneapolis, MN,pp. 70–13, 1995.[5] L.C.N. de Vreede, HF Silicon ICs for Wide-bandCommunication Systems. ISBN 90-90009594-2,Ph.D. Thesis, Delft University of Technology, 1996.[6] G. D. Vendelin, A. M. Pavio, and U. L. Rohde, Mi-crowave Circuit Design Using Linear and NonlinearTechniques. Wiley-Interscience, 1990.4

High Power Ultra Compact VCO with Active Reactance Concepts at 24 GHz

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