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Characterizing the Linearity Sweet-Spot Evolution in FET Devices

Abstract

In this paper,a complete characterization of the linearity sweet-spot evolution in MESFET/HEMT devices is presented. A global experimental extraction of the I ds(V gs,V ds) Taylor series coefficients is used tointroduce the small-signal behavior in the linear and saturated regions. The possibility of taking advantage of these points in different applications is also discussed. For the first time, a characterization of the influence of both bias voltages on the device transition towards the large-signal regime is presented. Finally, a technique for improving the linearity-efficiency tradeoff in a class B/C power amplifier (PA) is introduced

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