The effects of sintering on several properties of FTO and ITO substates used in DSC have been investigated. FTO & ITO substrates were prepared with a range of sizes and aspect ratios - emulated laboratory style test cells through to prototype modules. Time and temperature of the sintering profiles were varied and sheet resistance and flatness measured. Electrical properties of the substrates were then further characterized by electrochemical impedance spectroscopy, and module sized devices were assembled and thickness variations over the device area were determined and related to performance
