Complex digital systems are typically built on top of several
abstraction levels: digital, RTL, computer, operating system and
software application. Each abstraction level greatly facilitates the design
task at the cost of paying in performance and hardware resources usage.
Network time synchronization is a good example of a complex system
using several abstraction levels since the traditional solutions are a software
application running on top of several software and hardware layers.
In this contribution we study the case where a standards-compliant network
time synchronization solution is fully implemented in hardware on
a FPGA chip doing without any software layer. This solution makes it
possible to implement very compact, inexpensive and accurate synchronization
systems to be used either stand-alone or as embedded cores.
Some general aspects of the design experience are commented together
with some figures of merit. As a conclusion, full hardware implementations
of complex digital systems should be seen as a feasible design
option, from which great performance advantages can be expected, provided
that we can find a suitable set of tools and control the design
development costs
