In this paper it is proposed a new technique toimprove the reliability of fault-tolerant systemsbased on self-reconfigurable FPGAs. The aim is tocreate a self-tolerant system based on selfreconfiguration.To achieve this objective the workwas divided in five main tasks: the analysis of faultinducement mechanisms in FPGAs, its correlationand its matching with existent fault models, or,eventually, if necessary, the proposal of a newmodel; the design and evaluation of a fault tolerancemechanism for FPGAs; the design andimplementation of a methodology able to detect,diagnose and repair the emerging faults; thedevelopment and validation of the proposedmethodology. This study will be the base for a PhDthesis
