This paper presents the algorithms of an implementation of a numerically efficient carbon nanotube transistor (CNT) model in HSPICE. The model is derived from cubic spline non-linear approximation of the non-equilibrium mobile charge density. The spline algorithm exploits a rapid and accurate solution of the numerical relationship between the charge density and the self-consistent voltage, which results in the acceleration of deriving the current through the channel without losing much accuracy. The output I-V characteristics of the proposed model have been compared with those of a recent HSPICE implementation of the Stanford CNT model and published experimental I-V curves. The results show superior accuracy of the proposed model while maintaining similar CPU time performance. Two versions of the HSPICE macromodel implementation have been developed and validated, one to reflect ballistic transport only and another with non-ballistic effects. To further validate the model a complementary logic inverter has also been implemented using the proposed technique and simulated in HSPICE

Al-Hashimi, Bashir

Kazmierski, Tom

Zhou, Dafeng

English

Southampton (e-Prints Soton)

HSPICE implementation of a numerically efﬁcientmodel of CNT transistorTom J Kazmierski, Dafeng Zhou and Bashir M Al-HashimiSchool of Electronics and Computer Science, University of Southampton, Southampton, SO17 1BJ, UKdz05r,tjk,bmah@ecs.soton.ac.ukAbstract—This paper presents the algorithms of an imple-mentation of a numerically efﬁcient carbon nanotube transistor(CNT) model in HSPICE. The model is derived from cubicspline non-linear approximation of the non-equilibrium mobilecharge density. The spline algorithm exploits a rapid and accuratesolution of the numerical relationship between the charge densityand the self-consistent voltage, which results in the accelerationof deriving the current through the channel without losing muchaccuracy. The output I-V characteristics of the proposed modelhave been compared with those of a recent HSPICE implemen-tation of the Stanford CNT model and published experimentalI-V curves. The results show superior accuracy of the proposedmodel while maintaining similar CPU time performance. Twoversions of the HSPICE macromodel implementation have beendeveloped and validated, one to reﬂect ballistic transport only andanother with non-ballistic effects. To further validate the modela complementary logic inverter has also been implemented usingthe proposed technique and simulated in HSPICE.I. INTRODUCTIONTransistors using carbon nanotubes (CNTs) have shown thepotential of becoming the basis of next generation integratedcircuits (ICs) [1], [2]. A number of theoretical models havebeen proposed to describe the different physical phenomenawithin the nanotube channel and their effect on the perfor-mance of the device [3], [4], [5], [6], [7], [8]. The standardmodelling methodology relies on repetitive numerical evalu-ation of the Fermi-Dirac integral to obtain the drain-sourcecurrent for a given set of terminal potential. Recently improvedapproaches have been proposed where the slow iterativeprocess is replaced by direct calculations using numericallyefﬁcient approximations while still maintaining good accuracycompared with the basic theory [6], [9]. These new techniquesrely on piece-wise approximation of charge densities, eitherlinear [6] or non-linear [9] to simplify the numerical calcula-tion. The improved models have been implemented and testedin MATLAB and VHDL-AMS [10]. Here we propose a morepractical implementation using the HSPICE macromodellinglanguage [11]. The model has been validated using sampletransistor circuits and logic gates and demonstrated to comparefavourably in terms of accuracy with the recently releasedStanford HSPICE CNT model. The HSPICE model proposedhere has been demonstrated to have the potential of includingnon-ballistic effects in the evaluation of the drain current.II. CALCULATION OF THE SELF-CONSISTENT VOLTAGEWhen voltages are applied to the drain and the source ofa CNT transistor as illustrated in ﬁgure 1, a non-equilibriummobile charge is generated in the carbon nanotube channel,which can be described in 1as follows[1], [12], [13]:Fig. 1. Structure layout of a top-gate CNT transistor showing componentsof the proposed equivalent circuit model with the virtual node for VSC.ΔQ = q(NS + ND − N0) (1)where NS is the density positive velocity states ﬁlled bythe source, ND is the density of negative velocity statesﬁlled by the drain and N0 is the equilibrium electron density.These densities are determined by the Fermi-Dirac probabilitydistribution:NS =12 +∞−∞D(E)f(E − USF)dE (2)ND =12 +∞−∞D(E)f(E − UDF)dE (3)N0 = +∞−∞D(E)f(E − EF)dE (4)where D(E) is the density of states, f is the Fermiprobability distribution, E represents the energy levels pernanotube unit length, and USF and UDF are introduced asUSF = EF − qVSC (5)UDF = EF − qVSC − qVDS (6)where EF is the Fermi level, q is the electronic charge andVSC represents the self-consistent voltage [1] whose presencein these equations illustrates that the CNT energy band isaffected by external terminal voltages. The self-consistentvoltage VSC is determined by the device terminal voltages andcharges at terminal capacitances by the following non-linearalgebraic equation [1], [6]:VSC = −Qt + qNS(VSC)+qND(VSC)+qN0CΣ(7)where Qt represents the charge stored in terminal capaci-tances and is deﬁned asQt = VGCG + VDCD + VSCS + VSubCSub (8)where CG,C D,C S,C Sub are the gate, drain, source andsubstrate capacitances correspondingly and the total terminalcapacitance CΣ isCΣ = CG + CD + CS + CSub (9)Cox =2 πk1ε0/ln(2tox + dd) (10)CSub =2 πk2ε0/ln(4HSub/d) (11)where d is the diameter of the carbon nanotube, HSubis the thickness of the SiO2 layer on the substrate, toxis the thickness of the gate insulator and k1, k2 are therelative permittivities of the gate and the substrate respectively[14]. Meanwhile, the capacitances between terminals can beobtained as follows as reported previously [15].CG = Cox (12)CS =0 .097Cox (13)CD =0 .040Cox (14)According to the ballistic CNT ballistic transport theory[1], [15] the drain current caused by the transport of the non-equilibrium charge across the nanotube can be calculated usingthe Fermi-Dirac statistics as follows:IDS0 =2qkTπF0(USFkT) −F 0(UDFkT)(15)where F0 represents the Fermi-Dirac integral of order 0, kis Boltzmann’s constant, T is the temperature and  is reducedPlanck’s constant.The numerical efﬁciency of the ballistic CNT transportmodel presented above hinges on an efﬁcient calculation ofthe non-equilibrium mobile charge. Piecewise approximationof the mobile charge based on cubic splines signiﬁcantlyaccelerates calculations without losing much accuracy [9]. Themobile charge can be presented as a function of a singlevariable, the self-consistent voltage VSC:Q(VSC)=q2 +∞−∞D(E)f(E − EF − VSC)dE (16)Hence, a simple spline structure, using n equally spacedpoints, can easily be constructed approximate the mobilecharge dependence on VSC. If cubic splines are used theindividual polynomial pieces have the following formQ(VSC)=aiV 3SC + biV 2SC + ciVSC + di (17)where ai, bi, ci and di, i =1 ,...,n − 1 are splinecoefﬁcients. This enables a closed-form solution of the self-consistent voltage equation (7) as, for each piece, it nowbecomes a a polynomial equation of the third order. Thus, theneed for costly Newton-Raphson iterations and evaluations ofFermi-Dirac integrals is eliminated. Once the self-consistentvoltage VSC is efﬁciently calculated from the closed-formsolutions of equation (7), the total drain current can be directlyobtained from equations (5), (6) and (15).Figure 2 shows IDS characteristics obtained from a MAT-LAB simulation, where an example model that uses threecubic splines, n =4 , and two linear pieces at the ends wascompared with the theoretical curves calculated by FETToyfrom equations (3) and (4) correspondingly.Fig. 2. Drain current characteristics at T = 300K and EF = −0.32eV forFETToy(solid lines) and 3 pieces cubic spline approximation (dashed lines).To solve the resulting 3rd order polynomial equations,Cardano’s method [16] is applied to determine the appropriateroot which represents the correct value of VSC. Since the self-consistent voltage VSC is directly obtained from the splinemodel, the evaluation of the drain current poses no numericaldifﬁculty as energy levels USF, UDF can be found quicklyfrom equations (5), (6) and IDS can be calculated usingequation (15).III. HSPICE MACROMODEL IMPLEMENTATIONHaving implemented the spline-based numerical model inMATLAB, HSPICE macromodels of an n-type-like and p-type-like CNT transistor have been developed. Figure 3 showsthe IDS characteristics of the n-type-like transistor imple-mented in HSPICE compared with the output current of arecently reported CNT transistor SPICE model from StanfordUniversity [17], [18]. DC sweep simulations were carried outwith the gate voltage of 0V to 0.6V with 0.1V step and drain-source voltage 0V to 0.6V with 0.01V step. Both modelsimplement near-ballistic transport. Discrepancies in the IDScurrent values can be explained by the fact that the Stanfordmodel considers subband effects which reduce the current[17],[18].I−V Characteristics for Proposed Model and Stanford ModelIds(A)0.02.5u5u7.5u10uVds(V)0.0 0.1 0.2 0.3 0.4 0.5 0.6Ids(A) : Vds(V)Proposed ModelStanford ModelFig. 3. Comparison of Drain current characteristics at T = 300K andEF = −0.32eV for the proposed HSPICE macromodel and the Stanfordcircuit-level model [17], [18].The spline model has the potential to include arbitrary non-ballistic effects in and therefore can be used to predict theperformance of non-ideal CNT transistors. Figure 4 showsthe IDS characteristics of the n-type-like CNT transistorimplemented in HSPICE with the elastic scattering effect [18]and the strain effect on the channel region [19]. Neither ofthese effects is included in the Stanford model. The straineffect can change the band gap of the CNT channel and thusreduce the drain current, which matches the output resultsof the model. It can be seen from the graphs in Figure 4that the proposed HSPICE model matches more closely theexperimental results presented in Figure 5, especially in termsof the saturation region region slope, than the Stanford model.Additionally, to verify the accuracy of the proposedmacromodel, recently reported experimental characteristics[20] were compared with the spline-based model for d =1.6nm,tox =5 0 nm,T = 300K and EF = −0.05eV andpresented in Figure 5. It also shows the performance of theStanford model under the same conditions. The results showa close match between the proposed cubic spline macromodeland experimental measurements, which is more accurate thanthe Stanford model while maintaining similar speed as shownin Table I.A corresponding p-type-like CNT transistor has also beenimplemented in HSPICE and Figure 6 illustrates the corre-I−V Characteristics for Proposed Model and Stanford Model with EffectsIds(A)0.02u4u6u8uVds(V)0.0 0.1 0.2 0.3 0.4 0.5 0.6Ids(A) : Vds(V)Proposed ModelStanford ModelFig. 4. Drain current characteristics at T = 300K and EF = −0.32eVfor the proposed HSPICE macromodel with the strain effect [19].0 0.1 0.2 0.3 0.400.10.20.30.40.50.60.70.80.91x 10−5VDSIDS   [A]VG=0VVG=0.2VVG=0.4VVG=0.6V[V]Fig. 5. Comparison to the experimental results(circlet lines) of the proposedcubic spline model with n =4(solid lines) and Stanford model (dashed lines)for d =1 .6nm,tox =5 0 nm,T = 300K and EF = −0.05eV .sponding IDS characteristics. Both n-type-like and p-type-likemodels were used in an analysis of a complementary CMOS-like CNT inverter. The bulk voltage has also considered totake into account the effects on the charge densities generatedby the substrate voltage, which is important to reﬂect correctlythe behaviour of p-type-like CNT transistor.The HSPICE simulation results of the complementary in-verter are shown in ﬁgure 7. The ﬁgure shows the transfercharacteristic calculated by using a ramp voltage as the inputsignal.The HSPICE macromodel code for the parameter libraryand transistor macromodel is shown below.TABLE IAVERAGE RMS ERRORS AND CPU TIME INIDS COMPARISON TO THEEXPERIMENTAL RESULTS OF FETTOY MODEL AND THE PROPOSEDNON-BALLISTIC(NB) MODELS FORd =1 .6nm,tox =5 0 nm,T = 300KAND EF = −0.05eV .VG[V ] Proposed Macromodel n =4 Stanford Model0.2 13.3% 35.7%0.4 12.5% 29.6%0.6 11.3% 25.2%CPU Time[s] 40.32 47.60I−V Characteristics for Proposed P−type ModelIds(A)−10u−7.5u−5u−2.5u0.0Vds(V)−0.6 −0.4 −0.2 0.0Ids(A) : Vds(V)Proposed P−type ModelFig. 6. Drain current characteristics for a p-type CNT transistor HSPICEmacromodel.* Library name: param.lib**************************************************** Global parameters***************************************************.PROTECT.PARAM q=1.60e-19 $ Electronic charge+ Vcc=’3.0*q’ $ The carbon PI-PI bond energy+ acc=0.142e-9 $ The carbon PI-PI bond distance+ a=0.2495e-9 $ The carbon atom distance+ pi=3.1415926 $ PI, constant+ h=6.625e-34 $ Planck constant+ h_ba=1.0552e-34 $ h_bar+ KB=1.380e-23 $ Boltzmann constant+ epsr=8.854e-12 $ Dielectric constant in vacuum+ k=3.9 $ Relative dielectric constant+ t0=1.5e-9 $ The gate dioxide thickness+ L=3.0e-8 $ Length of the cnt+ N0=1.1431e3 $ Flat band mobile charge density+ Cso=0.097 $ Source capacitance coefficient+ Cdo=0.040 $ Drain capacitance coefficient+ Ef=-0.32 $ Fermi level+ dcnt=1e-9 $ Diameter of CNT+ T=300 $ Temperature+ lambda_op=15e-9$ The Optical Phonon backscattering mean-free-path+ lambda_ap=500e-9$ The Acoustic Phonon backscattering mean-free-path.UNPROTECT***************************************************I−V Output of an Inverter using Proposed Spline ModelsVout(V)0.00.20.40.6(V)0.0 0.1 0.2 0.3 0.4 0.5 0.6Vin(V)0.00.20.40.6Vout(V) : (V)v(out)Vin(V) : (V)v(in)Fig. 7. Inverter simulation result in HSPICE; input ramps from 0V to 0.6V .* CNT transistor model using 4-piece cubic spline** File name: cntmodel.sp**************************************************** Library file CNmodel.lib provides the spline coefficients* and the sub-circuit description of the proposed macromodel,* which sets the node of the device and calculate the current* of the model..TITLE ’IV Characteristics for CNT Transistor’.options POST.options AUTOSTOP.options INGOLD=2 DCON=1*.options GSHUNT=1e-20 RMIN=1e-20.options ABSTOL=1e-5 ABSVDC=1e-4.options RELTOL=1e-2 RELVDC=1e-2.options NUMDGT=4 PIVOT=13.param TEMP=27.lib ’CSmodel.lib’ CSmodel****************************************************Beginning of circuit and device definitions*Supplies and voltage params:.param Supply=0.6.param Vg=’Supply’.param Vd=’Supply’*Some CNFET parameters:.param t0=1.5e-9.param L=3.0e-8.param Ef=-0.32.param dcnt=1e-9**************************************************** Define power supplyVdd Drain Gnd VdVss Source Gnd 0Vgg Gate Gnd VgVsub Sub Gnd 0**************************************************** Main Circuits* nFETCNT Drain Gate Source Sub nCNT Lch=L Efi=Ef dia=dcnt Tox=t0**************************************************** Measurements* test nFETs, Ids vs. Vgs.DC Vdd START=0 STOP=’Supply’ STEP=’0.01’+ SWEEP Vgg START=0 STOP=’Supply’ STEP=’0.1’***************************************************.print I(Vdd).endThe complete code for the proposed HSPICE model is nowavailable on the Southampton Carbon Nanotube TransistorModelling website [21] and available for public use.IV. CONCLUSIONThis paper proposes an HSPICE implementation of thecubic spline based numerically efﬁcient CNT transistor model.HSPICE simulation results match closely those from MAT-LAB simulations and also recently published experimentalmeasurements. Results show that the accuracy of the proposedHSPICE implementation is superior to that of the state-of-the-art CNT SPICE model developed at Stanford University,while maintaining similar simulation speed. The accuracy ofthe proposed model can be further increased by inclusion ofother physical effects, speciﬁcally non-ballistic transport. Todemonstrate the feasibility of adding non-ballistic effects, aversion of the model has been developed and implemented inHSPICE to include elastic scattering and the strain effect.V. ACKNOWLEDGEMENTThis project has been funded in part by the EPSRC (UK)grant EP/E035965/1.REFERENCES[1] Anisur Rahman, Jing Guo, Supriyo Datta, and Mark S. Lundstrom.Theory of ballistic nanotransistors. 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A circuit-compatible model of ballistic carbon nanotube ﬁeld-effect transistors.

A compact spice model for carbonnanotube ﬁeld-effect transistors including nonidealities and its application - part i: model of the intrinsic channel region.

A compact spice model for carbonnanotube ﬁeld-effect transistors including nonidealities and its application - part ii: full device model and circuit performance benchmarking.

Advantages of top-gate, high-k dielectric carbon nanotube ﬁeld-effect transistors.

An efﬁcient and symbolic model for charge densities in ballistic carbon nanotube FETs.

Cadence openbook se 5.3, ic 4.4.5 and lvd 3.0,

Calculation of densities from cubic equations of state.

Carbon nanotube electronics.

Cntfet basics and simulation.

High performance n-type carbon nanotube ﬁeld-effect transistors with chemically doped contacts. Nano Letters,

Modeling and analysis of circuit performance of ballistic CNFET.

Modeling and analysis of planar-gate electrostatic capacitance of 1-d fet with multiple cylindrical conducting channels.

Numerically efﬁcient modeling of cnt transistors with ballistic and non-ballistic effects for circuit simulation.

SchottkyBarrier Carbon Nanotube Field-Effect Transistor Modeling.

Semi-empirical SPICE models for carbon nanotube FET logic.

Single-walled carbon nanotube electronics.

Theory of ballistic nanotransistors.

Tuning carbon nanotube band gaps with strain.

VHDLAMS implementation of a numerical ballistic CNT model for logic circuit simulation.

HSPICE implementation of a numerically efficient model of CNT transistor

HSPICE implementation of a numerically efficient model of CNT transistor

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