Mizuta, Hiroshi

Oda, S.

Tsuchiya, Yoshishige

English

Southampton (e-Prints Soton)

 -1-Silicon nanoelectronics for ‘More than Moore’ and   ‘Beyond CMOS’ domains  H Mizuta1, Y. Tsuchiya2 and S. Oda2 1 School of Electronics and Computer Science, University of Southampton, Southampton, UK   and Department of Physical Electronics, Tokyo Institute of Technology, Tokyo, Japan 2 Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, Tokyo, Japan e-mail:hm2@ecs.soton.ac.uk  Over the past few decades, the performance of VLSI circuits has steadily been improved by scaling down CMOS device dimensions. The latest ITRS predicts that the top-down (‘More Moore’) approach will be pursued further and the physical gate length of the high-performance CMOS will reach 9 nm in 2016. However, maintaining such aggressive top-down trend is getting increasingly difficult both technologically and economically, and massive efforts are now made on exploring emerging research materials and devices. In this paper we present our recent attempts to introduce novel silicon nanotechnologies for developing advanced information devices for ‘More than Moore’ and ‘Beyond CMOS’ domains.    First, we discuss co-integration of nanoelectromechanical (NEM) structures with conventional silicon devices for building novel memory and logic devices. As an example, we show a new high-speed and nonvolatile NEM memory, which features a suspended and buckled SiO2 beam with embedded nanocrystalline Si dots as single-electron storage (Fig. 1) [1],[2]. We also discuss new operating principles of hybrid NEMS-MOS-SET (single-electron transistor) systems [3]. A movable gate integrated into MOSFETs and SETs works as a binary capacitive switch and results in unique device characteristics which cannot be realized with conventional devices. The MOS-NEMS, for example, gives an extremely sharp subthreshold slope beyond a theoretical limit (S~60mV/dec) for MOSFETs.    Second, we present strongly-coupled double silicon nanodots as a charge qubit for building quantum information processing systems. We show the electrical observation of electrostatic and quantum-mechanical coupling of electrons for the double silicon nanodots [4],[5]. By using both top-down and bottom-up nanofabrication techniques, we fabricate experimental single and double qubit structures integrated with a single-charge readout consisting of series-connected double SETs (DSETs) (Fig. 2). By conducting the single-electron circuit simulation we demonstrate that different single-charge polarizations on the double qubits can be detected by the DSETs [6].  References 1. Y. Tsuchiya et al., J. Appl. Phys. 100, 094306 (2006) 2. T. Nagami et al., IEEE Trans. Electron Devices 54, 1132 (2007) 3. B. Pruvost, H. Mizuta, and S. Oda, IEEE Trans. Nanotechnology 6, 218 (2007) 4. M. Khalafallah, Z.A.K. Durrani and H. Mizuta, IEEE Trans. Nanotechnology 2, 271 (2003) 5. M. Khalafallah, H. Mizuta and Z.A.K. Durrani, Appl. Phys. Lett. 85, 2262 (2004) 6. Y. Kawata et al., Jpn. J. Appl. Phys. 46, 4386 (2007) floating-gatechannel S DSiND arrayGe- e- e- e-Fig. 1 Schematic NEM memory 300nmG1G2G3G4G5G6 G7300nmG1G2G3G4G5G6 G7 Fig. 2 Double qubits with readout

Silicon nanoelectronics for ‘More than Moore’ and ‘Beyond CMOS’ domains (Invited Talk)

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