This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM

Berg, Melanie

Friendlich, Mark

Irom, Farokh

Kim, Hak

LaBel, Kenneth A.

Nguyen, Duc

Oldham, Timothy R.

NASA Technical Reports Server

National AeronauticsNEPP Electronic Technology Workshop   
and Space Administration
   
June 22-24, 2010
Nonvolatile Memory Technology for 
Space Applications 
Timothy R. Oldham1, Farokh Irom2, Mark 
F i dli h3 D N 2 H k Ki 3r en c , uc guyen , a  m , 
Melanie Berg3, and Kenneth A. LaBel4
1 Dell-Perot Systems Inc /NASA GSFC; 2 NASA Jet.   , .   .   
Propulsion Laboratory; 3.  MEI, Inc./NASA GSFC; 
4. NASA
June 23, 2010
1
https://ntrs.nasa.gov/search.jsp?R=20100025764 2019-08-30T10:00:17+00:00Z
Introduction
Nonvolatile Memories 
• Flash (NAND, NOR)
• Charge Trap
• Nanocrystal Flash
• Magnetic Memory (MRAM)
• Phase Change--Chalcogenide, (CRAM)
• Ferroelectric (FRAM) 
• CNT
• Resistive RAM 
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.JOWOG 36C, 13 June 2007
Flash Background
–Disadvantages
• Slow programming 
• Wear out
Scaling/retention•
–Advantages
• Cost per bit
• Low power
–Bottom Line:  Heavily used in hand-held, 
b tt d l t ia ery-powere  consumer e ec ron cs 
(cell phones, iPods, digital cameras, MP3)
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.JOWOG 36C, 13 June 2007
3
Floating Gate Transistor
Control Gate
–n+ –n+
FG
–p - body
–Source –Drain
 Write (Program) operation—Fowler-Nordheim (FN)   
injection of electrons into FG
 Erase operation—FN injection of electrons from FG to        
substrate
 Repeated P/E operations cause damage to tunnel oxide
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 4
       
Flash Architectures
NAND NOR
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.JOWOG 36C, 13 June 2007
5
– –
Flash Radiation Response   
 TID response frequently very good for NAND
 NOR TID not so good
 SEU bit error rate very good compared to most
volatile memories 
 Control logic errors (SEFIs) are biggest problem, 
mitigation strategies very important     
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 6
Thi Fil St– n m orage
–Nonvolatile
–Memories
Silicon NanocrystalC t l
Polysilicon Charge
Storage Medium
(Conductor)
ONO
I l Nitride Charge
Charge Storage Medium
(Isolated Conductors)
Gate
Poly
Floating
Gate
on ro
Gate
nterpo y
Dielectric Storage Medium
(Insulator)
Gate
Poly
Source DrainSource Drain Source Drain
50 - 100Å Oxide
Si
Nanocrystal
"Immobile"
Charges
Charges are mobile
50 - 90Å Oxide
Substrate
50 - 100Å Oxide
Leakage
path due
to SILC,
etc.
Substrate
~ 100Å
Tunnel
Oxide
Substrate
Nitride
18 - 70Å Oxide
Immobile Charges
–Floating Gate– SONOS
–(oxide/nitride/oxide)
–Nanocrystal
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.
Evaluation of Non-Volatile Memory
–Description:  This is a continuation task for evaluating the 
effects of scaling (<100nm) , new materials, etc. on state-of-the-
art (SOTA) non-volatile memory (NVM) technologies. The intent is 
t
FY10 Plans:
–Probable test structures 
-Flash (NAND)o:
- Determine inherent radiation tolerance and sensitivities,
- Identify challenges for future radiation hardening efforts,
- Investigate new failure modes and effects, and
- Provide data to technology modeling programs
 
-Samsung  8G, (SLC and MLC),  Micron (8G), Numonyx (4G)
-Micron 128G stack, Micron 64G monolithic
-Flash (NOR)--Spansion 1G MirrorBit
-Phase change --Numonyx     .
–Testing includes total dose, single event (proton, laser, heavy 
ion), and proton damage (where appropriate). Test vehicles are 
expected to be a variety of non-volatile memory devices as 
available including Flash (NAND and NOR), magnetic, phase 
change etc
-FRAM--TI hardened and unhardened
-MRAM—Avalanche Spin Torque 
–New tests:
– - Reliability study, retention after radiation exposure and cycling
, …
–Angular effects as well as statistical analysis are key 
considerations.
–Test Guideline
– - Develop draft guideline for radiation testing
Schedule: Deliverables:
-Test reports and quarterly reports
-Submissions to IEEE NSREC (TNS and REDW) and SEE 
Symposium.
Draft test and application guideline
NVM  2010       
Radiation T&E O N D J F M A M J J A S
Monitor MRAM, CRAM, CNT, and 
FeRAM progress
Micron 128G Stack SEE
2009
NASA and Non-NASA Organizations/Procurements:
-     .
Beam procurements: TAMU, IUCF, REF
NASA Flight Project Funds (Magnetospheric MultiScalar -MMS)
Partners: SWRI Samsung Micron Numonyx Avalanche
  -
Numonyx 4G NAND TID, SEE
Sams, Micron 8G SEE
Sams, Mic Retention Test
Micron TID
Current Spike Report
T t R t
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.
3PI: GSFC/Oldham: JPL/Irom
 , , , ,  
Semiconductor, Unity
es  epor s
Spin Torque MRAM TID
Evaluation of Non-Volatile Memory Goals
 Utilize flash memories as test 
vehicles for radiation effects 1 00E 03
1.00E-02
1.00E-01
1.00E+00
i
c
e
)
SEFI X-Sec
Static Bit Error X-Sec
Destructive
    
understanding of scaled 
CMOS
 Characterize advanced 
hardened and unhardened 1 00E 07
1.00E-06
1.00E-05
1.00E-04
. -
s
s
 
s
e
c
t
i
o
n
 
(
c
m
2
/
d
e
v
   
nonvolatile memories. This 
includes:
 New materials 1.00E-10
1.00E-09
1.00E-08
. -
0 10 20 30 40 50 60
C
r
o
s
 New technologies and 
architectures
 Current flash operate at 
3 3V 40 MHz
New failure modes
1
Effective LET (MeVcm2/mg)
. ,  
 Increase speed with new 
45 nm (16G SLC)
 Identify new failure modes— 0.0001
0.001
0.01
0.1
m
2
/
d
e
v
i
c
e
)
including combined effects
 Develop new test methods 
and identify mitigating 
strategies 1E-09
1E-08
1E-07
1E-06
1E-05
C
r
o
s
s
 
s
e
c
t
i
o
n
 
(
c
m
SEFI X-Sec 840 Transient
Destructive 840 Static
843 Transient 843 Static
846 Transient 846 Static
901 Transient 901 Static
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 9
1E-10
0 50 100
Effective LET (MeVcm2/mg)
907 Transient
Expected Impact to Community   
• NVM has always been critical in some       
applications, e.g., critical flight data, and 
flight control software
• Solid state NVM starting to be used in SSR 
(Solid State Recorders), replacing volatile 
memories
• Solid state NVM has speed advantage over 
hard disk drives  
• NAND flash has advantage over most 
alternatives in cost per bit
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 10
Nonvolatile Memory Evaluation Status
• Phase Change—samples obtained from 
Numonyx, SEE and TID testing performed
• STT-MRAM—Avalanche to supply test structures, 
TID proton test planned
• CNT—LM to supply test structures, unclear when
• FeRAM—TI, compare response of hardened and 
unhardened versions
C NVSRAM l i d l t t• ypress —samp es rece ve , aser es  
planned
Unity transistor less RAM to supply test• — -  ,    
structures
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.
Non-Volatile Memory Schedule     
FY10 Deliverables Quarter Due Quarter 
Completed
Notes
Micron 8G 64G Flash HI Tests Test 4QFY10 ,     
Report 1QFY11
Micron 32G MLC HI Test 1Q FY10 1Q FY10 NSREC 2010 DW
Numonyx 4GTID/HI tests TID 4QFY10
HI 3QFY10
HI 3Q FY10
Spansion 1G MirrorBit NOR TID Test 4QFY10
Report 4QFY10
Postponed from 
FY09
Micron 32G MLC TID 2Q FY10 2Q FY10 NSREC 2010 DW
Micron, Samsung Retention Tests Begin 4QFY10 NSREC paper to 
b b itt d fContinue FY11 e su m e  or 
July 2011
SP-MRAM TID Test 3QFY10
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.12
Highlights/Accomplishments
Single Event Upset Results
• SEU events were measured    
at BNL on SLC devices
(1, 2, 4 & 8Gb).
• All three samples showed 
excellent agreement.
• No noticeable scaling effect    
in the range of 120-72 nm
• Error bars smaller than 
plotting symbols
• There is a reduction in the 
SEU cross section at 51 nm     
feature size.
– Measured SEU cross-sections for Micron Technology SLC 
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.
NAND flash memories.  Only minimal dependence on feature 
size. 13
Highlights/Accomplishments
Single Event Upset Results
• The three samples measurements   
show excellent agreement.
• The FG SEU cross-section per
bit i th d f 3 10-10 s on e or er o  
cm2/bit.  Error bars smaller than 
plotting symbols.
• The FG SEU rate is 5.1x10-9
per bit per day for the 
background GCRs environment  .
• Micron 32G MLC NAND, 32 nm 
technology.
–SEU cross-section for Micron Technology 32Gb MLC NAND flash 
memory order of magnitude smaller than 8G MLC
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD.
,       
14
Highlights/Accomplishments
Numonyx 4G NAND SEE Test Results
0 01
0.1
1 One destructive  event 
after 2.3x107 Xe ions/cm2,
1E-05
0.0001
0.001
.
e
c
t
i
o
n
 
(
c
m
2
/
d
e
v
i
c
e
)
  
equivalent to 2.7x109 years
in geosynchronous orbit
1E-08
1E-07
1E-06
C
r
o
s
s
 
s
e
SEFI X-Sec
Dynamic R/E/W Bit 
Error X-Sec
  
 SEU rate manageable, 
especially with EDAC
1E-10
1E-09
0 20 40 60 80 100
Effective LET (MeVcm2/mg)
Destructive  
 SEFI impact unclear, 
mitigation required 
–Not enough data to endorse for flight programs, yet,
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 15
but initial results are promising
Highlights/Accomplishments
R li bilit /E d St de a y n urance u y
100
1000
10000
o
u
n
t
e
s
1
10
g
e
 
E
r
r
o
r
 
C
r
 
1
0
3
c
y
c
l
e
0 001
0.01
0.1
A
v
e
r
a
g
p
e
r
Best
Median
Worst
0.0001
.
0 20 40 60 80 100 120
Dose (krads (SiO )) 2
No clear indication that radiation exposure reduces
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 16
       
flash endurance
Highlights/Accomplishments
C t S ikurren  p es
 Current spikes observed in some experiments not     , 
in others
Two joint experiments have failed to explain differences        
 Agreed to disagree, for now
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 17
Phase Change Highlights
 Heavy ion testing performed at TAMU
 Chalcogenide storage element appeared to be 
“bullet proof”
 Unhardened commercial substrate suffered SEL 
 TID better than 100 krads (SiO2)
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 18
Radiation Testing—Lessons Learned
 Angular effects matter—differences observed between normal 
and high angle, also between tilt and roll at same angle
 Destructive effects in flash occur primarily in high voltage Program         
or Erase operations—have to emphasize
 Try to keep flux low enough to avoid collective effects, but want 
hi h fl f d t ti ti t d ff t ti i b tig  uence or goo  s a s cs— ra e-o s o op m ze eam me
 Have to estimate rate in space for effects observed in testing, 
e.g.,  flux in space at LET>60 is less than 1 ion/cm2 per hundred years
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 19
Plans (FY10/11)
• Reliability study—retention after cycling and radiation 
exposure
• Characterize Micron single die, SLC 64G NAND (25 nm)
• Compare SLC/MLC response (e.g., Samsung 8G)
• Prepare draft test guideline document for NVM testing
M it d l t f NVM t h l i• on or eve opmen  o  new  ec no og es, 
perform testing as test vehicles become available
To be presented at the 1st NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop June 22-24, 2010, NASA GSFC, Greenbelt, MD. 20


Nonvolatile Memory Technology for Space Applications

Abstract

Similar works

Full text

Available Versions

NASA Technical Reports Server