A main switch transistor is provided with a base drive circuit to vary the base drive current in accordance with load current to minimize power dissipation. Base drive may also be limited to a maximum for overload current limiting

Baker, Donal E.

NASA Technical Reports Server

4,156,837 
Baker [45] May 29, 1979 
United States Patent [191 11 11 
[54] DC STATIC SWITCH CIRCUIT WITH 
POWER SAVING FEATURE 
[75] Inventor: 
[73] Assignee: 
[21] Appl. No.: 
[22] Filed: 
Donal E. Baker, American 
Township, Allen County, Ohio 
Westinghouse Electric Corp., 
Pittsburgh, Pa. 
787,233 
Apr. 13,1977 
[51] Int. C l . 2  ................................................ G05F 1/58 
[52] U.S. Cl. ............................................ 323/4; 323/9 
[58] Field of Search ............... 323/4, 9; 307/296, 297; 
361/87,98 
r561 References Cited 
U.S. PATENT DOCUMENTS 
3,259,833 7/1966 Barter ...................................... 323/9 
3,441,833 4/1969 Bahrs et al. .............................. 323/9 
4,019,096 4/1977 Bullings ................................... 323/9 
OTHER PUBLICATIONS 
Proceedings Of IEEE Power Electronics Specialists 
Conf.” Jun. 1975, “3 Types of S.S. Remote Power Con- 
trollers’’, pp. 1-1 1. 
Primary Examiner-Gerald Goldberg 
Attorney, Agent, or Firm-G. H. Telfer 
P I  ABSTRACT 
A main switch transistor is provided with a base drive 
circuit to vary the base drive current in accordance 
with load current to minimize power dissipation. Base 
drive may also be limited to a maximum for overload 
current limiting. 
2 Claims, 2 Drawing Figures 
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U.S. Patent May 29, 1979 Sheet 1 of 2 4,156,837 
U.S. Patent May 29, 1979 Sheet 2 of 2 
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Dc STATIC SWITCH CIRCUIT WITH POWER 
GOVERNMENT CONTRACT 
formance Of work under NASA ‘Ontract NASA-9- 
the National Aeronautics and Space Act of 1958, Public 
Law 85-568 (72 Stat. 435; 42 U.S.C. 2457). 
BACKGROUND OF THE INVENTION 
with load current to minimize power dissipation. Base 
drive may also be limited to a maximum for overload 
The additional circuit portion in accordance with this 
5 invention senses load current, compares it with a refer- 
dance with the load current over a range from nearly no 
current there is essentially no and the effi. 
lo ciency is much better at partial load currents than for- 
merly. The drive losses, due to the base drive current, 
This invention relates to DC static switching circuits therefore are fixed at about 1% of the load current 
regardless of variations in load current. Incidental losses 
As general background to the present invention, ref- 15 from the extra Circuit COmpOnentS Will detract from 
overall efficiency. However, there is still attained a 
more uniform high efficiency than with prior circuits 
with only a modest requirement in additional compo- 
BRIEF DESCRIPTION OF THE DRAWINGS 
SAVING FEATURE, current limiting. 
The invention described herein was made in the per- 
l4Oo0 and is subject to the provisions Of Section 305 of 
ence, and allows the base drive current to vary in actor- 
load up to the current limiting level. For any given load 
particularly for use in electrical power systems. 
erence is made to an article by the present inventor 
entitled ‘‘Three Types of Solid State Remote Power 
Controllers” appearing in Proceedings of the IEEE 
“Power Electronics Specialists Conference”, June nents. 
1975. As is described therein, it is known to provide a 20 
transistorized DC static switch with a current limiting 
feature wherein the switching transistor base is con- 
nected in a servo loop with an operational amplifier to 
control maximum load current. Reference is made par- 
ticularly to FIG. 8, and the discussion relating thereto, 25 
in said article. This form of current limiting provides 
excellent current control which is independent of sup- 
ply voltage variations. Such circuits suffer the disad- 
vantage, however, of having undesirable power dissipa- 
tion for varying load current conditions below the cur- 3o 
rent limiting level. 
In applications in which solid state power controllers 
are particularly suitable, such as airborne applications, 
efficiency with minimal cost is an important require- 
ment. The former circuit provides full base drive cur- 35 
rent to the switching transistor continuously during all 
normal non-overload conditions. That is, the base drive 
current is independent of load current for levels below 
current limiting. At full rated load current, the drive 
losses are approximately 
( 1 ~  full load) ( VL) 3,898,552, Aug. 5, 1975, incorporated by reference 
P herein, is disclosed a D.C. switch with a combination of 
two transistors, in addition to the main switch, for im- 
or about 1% of rated load, where IL and VL are load provement in surge current pass capability. Such an 
current and supply voltage, respectively, and P is the 45 arrangement is suitable in the practice of the present 
gain of the transistor power switch (approximately 100). invention. 
This results in an efficiency Of no more than about 99% TO the base electrode of the power switch Q1 is con- 
at full load. Allowing for other losses, such as Saturation nected a base drive circuit portion in accordance with 
voltage drop, the total losses approach 2 to 3% of full this invention. The base drive circuit poaion has two 
40 
load delivered power giving an actual efficiency of 97 50 principal 
requirements, but at reduced load current levels the practice. The other part, comprising amplifier z2 and 
associated components, is for providing power saving at efficiency becomes poor. 
drive losses remain at fixed magnitude, and are 10 times Reference voltages for each part of the base drive greater from the efficiency standpoint than at full load. 
ofdelivered load circuit portion are developed by a resistive network 16 
power giving a maximum attainable efficiency of less including resistors R2, R3, R6 and R7. Series pairs 
than 90%. Normal operation of solid state power con- 61) R2-R3 and R6-R7 are each connected across a voltage 
trollers requires frequent use at below full load current reference zener diode D. *he Zener diode D is Con- 
and therefore this extra loss of efficiency becomes a nected between the supply terminal 14 and ground 
significant factor which is desirably to be avoided. through a resistor R9. A tap between resistors R2 and 
R3 provides a current limiting reference voltage on line 
SUMMARY OF THE INVENTION 65 18 to one input, the non-inverting input, of the current 
In accordance with the present invention, a DC static limiting control operational amplifier Z1. At the center 
switch has a main switch transistor with a base drive tap between R6 and R7 is developed on line 20 the 
circuit to vary the base drive current in accordance reference voltage for the power switch saturation con- 
which are interrelated. one part, com- 
to 98% at rated load for a typical 28 
This performance meets noma1 load 
DC system* prising amplifier Z1 and associated components, is for 
providing current limiting, in accordance with past 
At One-tenth Of rated load current, for the 55 reduced load current in accordance with this invention. 
losses now represent about 
FIG. 1 is a circuit schematic diagram of an embodi- 
ment of the present invention in relatively generalized 
form; and 
FIG. 2 is a circuit schematic diagram of one embodi- 
ment of the present invention in a more detailed form. 
DESCRIPTION OF THE PREFERRED 
EMBODIMENTS 
Referring to FIG. 1, the portion of a DC solid state 
power controller relevant to the present invention is 
shown, including a transistor power switch Q1 having 
emitter 10, base 11 and collector 12 electrodes with the 
emitter and collector electrodes connected between 
supply and load terminals 14 and 15. 
Power switch Q 1  is shown for simplicity as a single 
transistor element in FIG. 1. However, it will be under- 
stood there can be additional elements with Q1 which 
collectively receive base drive in accordance with this 
invention. For example, in Baker U.S. Pat. No. 
4,156,837 
3 
trol for power saving amplifier 2 2  at the inverting ter- 
minal of 22. 
Between the supply terminal 14 and the emitter 10 of 
Q1 is connected a current sensing shunt resistor R1. A 
line 22 is connected from a point between R1 and Q1 to 
the inverting input terminal of Z1. Z1 has bias terminals 
respectively connected to the supply terminal and to 
ground. 
The output terminal of Z1 is connected to the base of 
transistor 43. The collector of 43 is connected to 
ground through resistor R10 and also is connected to 
the base of transistor 42. 
Base drive current Ig from Q1, for the polarities 
shown, goes through base resistor Rg to the collector of 
4 2  as well as to the emitter of QS which is in a Darling- 
ton configuration with transistor 44, R4 and R5 being 
their emitter-base resistors. The power saving amplifier 
2 2  has its non-inverting input terminal connected to the 
circuit load terminal on line 24. The output terminal of 
2 2  is connected through resistor RS to the base of 44. 
The loop containing amplifier 2 2  allows the base 
drive current Ig to vary in accordance with the load 
current over a range of load current from nearly no load 
up to the current limiting level. The drive losses are 
now approximately equal to the reciprocal of the satura- 
tion gain of Q1 at any particular load current level, 
including partial load current. Since the gain of Q1 is 
nearly constant at about 100, the drive losses, due to Ig, 
are fixed at about 1% plus incidental losses due to the 
extra circuit components. 
The resistance of current sensing shunt resistor R1 
and the current limiting reference voltage provided by 
R2 and R3 are selected to provide zero differential input 
voltage at the inputs of Z1 at the point of current limit- 
ing. For load currents below the current limiting level 
the differential input voltage will cause Z1 to saturate to 
its negative supply rail, which in this case is ground. 
Hence, for normal, non-current limiting conditions, 43 
is saturated and does not require consideration with 
respect to the operation of the power saving amplifier 
22. 
The saturation voltage of Q1 is controlled to the 
power switch saturation voltage reference through 22, 
Q2, 4 4  and Q5. This saturation voltage is nearly equal 
to but somewhat more than the classical saturation volt- 
age level of Ql. For a transistor Q1 of type 2N6331 a 
value of 0.35 volts DC at one ampere fits this require- 
ment. As load current decreases, the current Ig required 
to keep Q1 at 0.35 volts also decreases giving the de- 
sired variable base drive for maximum efficiency. Simi- 
larly, as the load current increases, the base drive cur- 
rent Ig will be forced to increase via 2 2  until the current 
limiting level is reached. At this point the current sens- 
ing shunt voltage on line 22 will exceed the current 
limiting reference voltage on line 18 and the output of 
Z1 will be forced positive in a direction to reduce Ig. 
Reducing Ig under these conditions will cause Q1 satu- 
ration voltage to exceed its reference and that will cause 
2 2  to saturate to its negative supply rail, which is 
ground in this case, and will saturate 4 4  and QS. As a 
result, the circuit will switch over and Q1 will be com- 
pletely controlled by Z1 through 4 2  and 4 3  in a man- 
ner to limit maximum load current flow to the current 
limiting level regardless of the overload impedance. 
The switch will remain in this current limiting mode 
until either the overload is removed and load current 
returns to normal range or the switch is shut off. 
5 
10 
15 
20 
25 
30 
35 
40 
45 
50 
55 
60 
65 
4 
In a sense it can be seen that the circuit in accordance 
with this invention provides variable base drive for 
normal operating load currents with an override feature 
provided by the current limiting part of the base drive 
circuit portion that sets a maximum on the load current 
magnitude and cuts off the variable base drive part of 
the circuit. 
FIG. 2 is a somewhat more detailed schematic dia- 
gram including those elements shown in FIG. l as well 
as additional incidental circuit elements not believed to 
require detailed discussion but presented for purposes of 
a more specific example of the invention. Such circuits 
have been made and tested in the operation of a 3 am- 
pere, 28 volt DC, solid state power controller, and the 
following table identifies components as have been used 
in such power controllers and are presented merely by 
way of further example. 
~~ 
COMPONENTS SHOWN IN BOTH FIGS. 1 A N D  2 
Component Identification 
Transistor Q1 2N6331 
Transistor 4 2  2N5681 
Transistors 43,  44 ,  Q5 2N5400 
Opamps Z1 and 2 2  . IOlA 
Zener diode D 6.45 V. 
Resistor RB 350 ohms 
Resistor R1 50 mv., 3a., 2% shunt 
Resistor R2 8.5 kilohms 
150 kilohms Resistor R3 
Resistor R4 82.5 kilohms 
Resistors R5 and R8 1 megohm 
Resistor R6 402 ohms 
Resistor R7 37.4 kilohms 
Resistor R9 5.11 kilohms 
Resistor R10 8.25 kilohms 
Resistor R11 (parts A and B) 332 ohms and 100 ohms, resp. 
The following additional components and example 
values are presented for fuller understanding of FIG. 2: 
1. CR103 (39 V.) & R123 (249 ohms): Transient sup- 
pression for power supply on Z1 and 22. 
2. R104 (422 ohms) & ClOl (3.3 mf.): Load current 
rise time (di/dt) control when power controller is 
turned on. 
3. R122 (100 K.ohms), RllO (68.1 K.ohms) & QlO6 
(2N3019): Turn on and turn off of the power controller 
is accomplished by this circuit working in conjunction 
with R104, 2 2  and the current limiting reference volt- 
age (20). A “hi” input at R122 will turn off the RPC and 
a “low” will turn on the RPC. 
4. Z104C (4011), R126 (47.5 K.ohms) & 4107 
(2N3019): This is an economizer circuit which shuts off 
the reference circuit (R2, R3, R6, R7) when the RPC is 
off to conserve power. 
5. R105 (200 ohms), R106 (10 Megohms), C103 (150 
pf.) & C104 ( 5  pf.): Compensation circuit for gain and 
stability control of 2 2  (and current limiting loop). 
6. R112 (1 Megohm), R118 (1 Megohm) & CR107 
(1N49SB): Differential input voltage protection for Z1 
when RPC is off. 
7. C106 (20 pf.), ClOS (100 pf., 100 V.) & C109 (220 
pf.): Compensation circuit for gain and stability control 
of Z1 (and voltage control loop). 
8. C105 (0.01, 100 V.): Power supply by-pass capaci- 
tor for stability of Z1 and 22. 
9. C201 (2.2 mf.) & R201 (5.11 K.ohms): Compensa- 
tion circuit for stabilizing current limiting loop. Also 
controls load current fall time (di/dt) when RPC is 
turned off. Also limits peak overshoot current (for ap- 
5 
4,156,837 
6 
plied, low impedance faults) above steady state current 
limiting level. 
10. Q20l (2N5679) & 4202 (2N5681): “Gain shifter” 
circuit to increase gain of power switch Q1 when not in 
saturation, i.e., current limiting, turning on or turning 5 
off. Ref. U.S. Pat. No. 3,898,552. 
11. C202 (1 mf.), R11A: Compensation circuit for 
power switch stability near full turn off. 
From the arrangements shown it will be apparent 
such power controllers can be made in various other 10 
ratings, such as 5, 7.5, 10, 15 and 20 ampere, 28 V. DC 
units. 
The operation of the circuit in accordance with this 
invention, specifically that of FIG. 2, contrasts with the 
operation of the same power controller with otherwise 15 
the same conditions and components except that it does 
not include the power saving modification (Z2 and 
associated components) in accordance with this inven- 
tion. This is demonstrated by the following table in 
which variations in power dissipation and efficiency are 20 
shown for both the former circuit and the circuit with 
the improvement of this invention. This clearly demon- 
strates the much greater uniformity and higher em- 
ciency of operation of the present invention over a 
relatively wide range of load currents as compared with 25 
the former circuit. 
TABLE 1 
a supply terminal for connection to a direct voltage 
a load terminal for connection to a load; 
a main switch transistor having base, emitter and 
collector electrodes with said emitter and collector 
electrodes connected between said supply and load 
terminals; 
a base drive circuit portion connected to said base 
electrode of said main switch transistor and com- 
prising solid state amplifier means, responsive to 
load current between said supply and load termi- 
nals, for varying drive current magnitude to said 
base electrode in direct proportion to load current 
magnitude up to a predetermined rated load cur- 
rent magnitude; 
said first mentioned solid state amplifier means com- 
prises an operational amplifier having first and 
second input terminals, said first terminal being 
connected to said load terminal and said second 
terminal being connected to a reference voltage 
source, said operational amplifier having an output 
terminal coupled through transistor means to said 
base electrode. 
2. A DC static switch circuit in accordance with 
said base drive circuit portion also comprises second 
supply; 
claim 1 wherein: 
Performance Comparison of 3 Amp, 28 VDC, SSPC 
With an Without Power Saving Modification 
New Design 
(With Power Saving Mod.) 
Amps % of rated (watts) Efficiency % (watts) Efficiency % 
3.0 100 3.0 96.4 2.1 97.47 
2.7 90 2.85 96.2 1.9 97.46 
2.4 80 2.7 95.95 1.75 97.37 
2.1 70 2.55 95.6 1.6 97.25 
1.8 60 2.4 95.2 1.4 97.19 
1.5 50 2.3 94.5 1.25 96.99 
1.2 40 2.25 93.24 1.1 96.69 
.9 30 2.2 91.2 .9 96.39 
.6 20 2.15 87.1 .75 95.49 
.3 10 2.13 74.4 .55 93.38 
Old Design 
Load Current Dissipation Dissipation 
0 0 2. I 0 .5 0 
solid state amplifier means, responsive to load cur- 
rent between said supply and load terminals for 
limiting the maximum load current magnitude by 
limiting drive current magnitude to said base elec- 
trode to a maximum. 
45 
I claim: 
1. A DC static switch circuit with improved em- * * * * *  
50 
ciency comprising: 
55 
60 
65 


DC static switch circuit with power saving feature

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