Laterally stacked Schottky diodes for infrared sensor applications are fabricated utilizing porous silicon having pores. A Schottky metal contract is formed in the pores, such as by electroplating. The sensors may be integrated with silicon circuits on the same chip with a high quantum efficiency, which is ideal for IR focal plane array applications due to uniformity and reproducibility

Lin, True-Lon

English

NASA Technical Reports Server

United States Patent 1191 [ill Patent Number: 4,990,988 
Lin [45] Date of Patent: Feb. 5, 1991 
[54] LATEXALLY STACKED S C H 0 " K Y  DIODES 
[75] Inventor: TrueLon Lin, Cemtos, Calif. 
[73] Assignee: The United States of America as 
FOR INFRARED SENSOR APPLICATIONS 
represented by the Administrator of 
the National Aeronautics and Space 
Administration, Washington, D.C. 
[21] Appl. No.: 363,815 
[22] Filed: Jm.9,1989 
[51] Int. Cl .5  ............................................. HOlL 27/14 
[52] US. (3. ........................................ 357/30; 357/15; 
357/67 S; 357/71 S 
[58] Field of Search ................ 357/30 L, 30 C, 30 D, 
357/30 H, 30 P, 30 Q, 30 R, 31,32,15,67 S, 71 
S, 76; 437/3, 904, 906 
[561 References Cited 
us. PATENT DOCUMENTS 
4,023,258 5/1977 Carlson et al. ...................... 437/904 
4,065,742 12/1977 Kendall et ai. ....................... 357/76 
4,319,258 3/1982 Hamagel et al. ........... 357/15 
4,731,640 3/1988 Bluzer ............................... 357/30 H 
4,829,173 5/1989 Ditchek et al. ................... 357/30 C 
4,864,378 9/1989 Tsaur ................................ 357/30 C 
4,876,586 10/1989 Dyck et al. ....................... 357/30 C 
4,939,561 7/1990 Yamaka et al. ....................... 357/15 
FOREIGN PATENT DOCUMENTS 
55-95374 7/1980 Japan ................................ 357/30 C 
0002625 1/1981 Japan ................................... 437/904 
58-21382 2/1983 Japan ................................ 357/30 C 
59-5680 1/1984 Japan ................................ 357/30 C 
0229885 12/1984 Japan ...................................... 437/3 
61-19179 11/1986 Japan ................................ 357/30 C 
2101087 5/1987 Japan ...................................... 437/3 
5940586 3/1984 Japan ................................ 357/30 C 
Primary Examiner-Rolf Hille 
Assistant Examiner-Minhloan Tran 
Attorney, Agent, or Finn-TLomas H. Jones; John R. 
Manning 
[571 ABSTRACT 
Laterally stacked Schottky diodes (25) for infrared 
sensor applications are fabricated utilizing porous sili- 
con (10) having pores (12). A Schottky metal contact 
(24) is formed in the pores, such as by electroplating. 
The sensors may be integrated with silicon circuits on 
the same chip with a high quantum efficiency, which is 
ideal for IR focal plane array applications due to unifor- 
mity and reproducibility. 
6 Claims, 2 Drawing Sheets 
24 
https://ntrs.nasa.gov/search.jsp?R=19910012121 2020-03-24T06:59:46+00:00Z
U.S. Patent 
Fig. l a .  
Feb. 5, 1991 
Fig. IC. 
30. 
25' 
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Fig. l b .  
4,990,988 
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2 8  
IO 
Fig l b '  
US.  Patent Feb. 5, 1991 
Fig. 2. 
Sheet 2 of 2 4,990,988 
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16 - - - -  - -   
14 --- -- - - -  
0.6 
0.1 
0. 
T 
Fig. 3. 
I IO 20 30 40 50 60 0 . .  
CURRENT DENSITY (mA/cm2)  
+ 
0 
4.990,988 
1 
LATERALLY STACKED SCHOTTKY DIODES FOR 
INFRARED SENSOR APPLICATIONS 
ORIGIN OF THE INVENTION 
The invention described herein was made in the per- 
formance of work under a NASA contract, and is sub- 
ject to the provisions of Public Law 96- 
517(35U.S.C.202) in which the Contractor has elected 
not to retain title. 
TECHNICAL FIELD 
The invention relates to infrared sensors, and, more 
particularly, to Schottky diode infrared sensors. 
BACKGROUND ART 
Schottky diodes have been used as infrared (IR) sen- 
sors to form focal plane arrays which can be integrated 
with CCD (charge coupled device) addressing circuit 
and other image process circuits. The Schottky diodes 
have remarkable diode to diode photoresponse unifor- 
mity, wide dynamic range, and wide operating tempera- 
ture range. However, the quantum efficiency of 
Schottky IR sensors is low due to the inherent internal 
emission detection mechanism, which limits operation 
to low f-number systems. 
One possible approach to increase the quantum effi- 
ciency is using vertically stacked Schottky diodes. This 
apparently can only be achieved by alternative growth 
of epitaxial silicon and silicide layers by molecular beam 
epitaxy (MBE). 
Use of closely packed arrays of p-n or Schottky junc- 
tions oriented perpendicular to the plane of the silicon 
wafer has been proposed and demonstrated for the effi- 
cient detection of visible and near-IR light. However, to 
achieve a high quantum efficiency for IR light, the 
lateral dimensions of the metal layers must be reduced 
so that the photo-excited electrons will be collected by 
the Schottky junction before losing their energy 
through collision with cold electrons. Also, to achieve 
the effect of stacked Schottky diodes, the lateral dimen- 
sions of metal layers should be less than the IR absorp- 
tion length of the metal layers, which is about 200 A. 
Thus, trenches mutt be patterned with lateral dimen- 
sions of about 200 A and depth of several micrometers 
and later filled with metal to form such Schottky de- 
vices. This is difficult at best, if not impossible, with 
present lithographic and etching technologies. 
STATEMENT O F  THE INVENTION 
Accordingly, it is an object of the invention to pro- 
vide IR sensors comprising vertically stacked Schottky 
diodes. 
It is another object of the invention to provide a 
process for forming such IR sensors. 
In accordance with the invention, laterally stacked 
Schottky diode infrared detectors are provided utilizing 
porous silicon formation and electroplating. The fabri- 
cated stacked Schottky diode IR sensoq have metal 
rods with a diameter of about 50 to 200 A and can be 
several hundred pm deep. 
In the process of the invention, porous silicon is 
formed on silicon wafers by anodization in HF electro- 
lyte. The diameter and length of pores, as well as the 
spacing between pores, can be determined by the dop- 
ing concentration of silicon, HF concentration, the 
anodizing current density, and the anodization time. 
The pores can be formed with diameters ranging from 
5 
10 
15 
20 
25 
30 
35 
40 
45 
50 
55 
60 
65 
2 
about 50 to 200 A and length ranging from about 1 to 
more than 100 pm. The pores are then filled with a 
metal which forms a Schottky barrier contact with 
silicon by electroplating. Optionally, a silicide can be 
fabricated by annealing to form more uniform Schottky 
barriers, if desired. A thicker metal layer is subsequently 
evaporated to form electrical contact. 
BRIEF DESCRIPTION OF THE DRAWINGS 
FIGS. la-c depict, in cross-section, the sequence in 
processing to form the lateral stacked Schottky diodes 
of the invention, with FIG. lb’depicting an enlargement 
of a portion of FIG. lb; 
FIG. 2 depicts, in cross-section, a typical anodization 
system for porous silicon formation; and 
FIG. 3, on coordinates of porosity, which is defined 
as the volume percentage of the pores, and current 
density (in mA/cm2), is a plot of the porosity as a func- 
tion of various HF concentrations (%) and current 
density. 
DETAILED DESCRIPTION O F  THE 
INVENTION 
Referring now to the drawings wherein like numerals 
designate like elements throughout, a silicon substrate 
10 is depicted in FIGS. lo-c. In the practice of the 
invention, the substrate itself or an epitaxial layer of 
silicon may be used. The silicon may be doped, as de- 
scribed in greater detail below. 
Pores 12 are formed in the silicon 10 by anodization in 
a HF electrolyte. Acetic acid can be optionally added 
into the electrolyte to improve the surface morphology 
by eliminating any build-up of hydrogen gas bubbles on 
the substrate surface. The addition of acetic acid may 
range from about 5 to 20%. The anodization process is 
usually performed at room temperature (-25°C). 
The typical anodization process system is shown in 
FIG. 2. The anodization is done in a container 14, 
which contains the HF electrolyte 16. A platinum mesh 
18 is used as the cathode, and the silicon substrate 10 
serves as the anode. The silicon substrate 10 is main- 
tained in position by clamps (not shown) and a seal 20 
prevents loss of electrolyte and insulation from the 
container 14. A battery 22 provides the requisite cur- 
rent. 
Both p-type and n-type silicon substrates can be used 
to form the porous silicon layer. For n-type silicon, an 
additional process step, such as light illumination or 
electrical breakdown between HF electrolyte and n- 
type silicon, is required during the anodization process. 
Usually, p-type silicon is preferred because it has a 
lower Schottky barrier compared to n-type silicon, 
corresponding to a longer cut-off wavelength for IR 
detector applications. The doping concentration of sili- 
con wafers for porous silicon formation ranges from 
about 1 X lOI4  to 1 X 1020 cm-3. However, for the IR 
detector fabrication, the doping concentration should 
be kept below about 1 X 1018cm-3 to avoid forming 
ohmic contacts instead of Schottky barrier contacts 
after metal deposition thereon. 
The diameter (d) of the pores, their spacing (t), and 
length (1) (seen in FIG. la) are determined by the anod- 
ization condition, including the HF concentrations, the 
anodizing current density, and the anodization time. 
The pore diameter (d) and spacing (t) usually depend on 
the porosity, Le., the volume present of the pores, of the 
porous silicon layer. A large porosity usually corre- 
4,990,988 
3 4 
sponds to a large pore diameter as well as a large spac- 
ing. The porosity of porous silicon layers for various 
HF  concentrations and anodizing current is shown in 
FIG. 3. The porosity increases with an increasing cur- 
rent density and a decreasing HF  concentration. 
The length (1) of the pores is determined by the for- 
mation rate and the anodization time. The formation 
rate of the Pores depends on the HF concentration and 
the anodization current density. Typical pore formation 
rates for various HF  concentrations and anodization 10 
current densities are shown in Table I, below. For ex- 
steps. The silicide may be formed by annealing the me- 
tal/silicon assembly of FIG. lb. The formation tempera- 
ture and time of the silicides, their corresponding 
Schottky barrier heights, and their cut-off wavelengths 
5 are shown in Table 111, below. The annealing may be 
carried out at a temperature ranging from about 300"to 
500" C. for a period of time ranging from about 0.5 to 2 
hours. Generally, the higher temperatures are associ- 
ated with the lower times, and vice versa. 
TABLE I11 
Schottky Bamer and Wavelength 
Cut-off for Various Metal 
Silicides Contacting Silicon. 
PtSi IrSi Pd2Si CoSil Nisi? 
Schottky 0.22 0.15 0.37 0.48 0.42 
Barrier, V 
ample, pores with a length of 9 pm can be formed by 
anodizing Si in a 49% HF electrolyte with a current 
density of 64 mA/cm2 for 1 min. 
TABLE I 
Etching Rate (&a/sec) As A Function 
15 
Of Current Density and HF Concentration. Cut-off, pm 4.4 8 3.4 2.6 ' 3 
Current Density, HF Concentration, % 
25 35 49 The Schottky barrier metal 24 is then provided with 
a thicker metal contact 30 for interconnection to other 12.8 250 300 360 32 490 630 690 
64 850 1200 1250 areas of the chip. The metal layer 30 can be formed by 
any metal deposition technique, such as evaporation, 
sputtering, or electroplating, to a thickness ranging 
current density may range from about lo to loo 25 from about 100 to 1,ooO nm. The metal layer 30 may be 
the same metal used for the Schottky barrier, or may 
cess of integrated circuits, such as aluminum or gold. 
20 . 
mA/cm2 
mA/cm2, The HF concentration may range from about 
25 to 49%, and the time of etching may range from 
Returning now to FIG. 1, the pores 12 are then filled 
with an appropriate metal 24 which forms a Schottky 3o 
barrier with silicon 10. The resulting structure is shown 
num, iridium, palladium, cobalt, and nickel. The 
Schottky barrier formed by these metals and their cor- Thus, there has been disclosed laterally stacked 
responding cut-& wavelength for IR detector applica- 35 Schottky diodes for infrared sensor applications. It will 
tions are shown in Table 11, below. be appqent to one of ordinary skill in the art that vari- 
ous changes and modifications of an obvious nature may 
be made, and all such changes and modifications are 
deemed to fall within the scope of the appended claims. 
I claim: 
1. An infrared sensor comprising a plurality of later- 
Schottky 0.35 0.31 0.48 0.51 ally stacked Schottky diodes, each diode comprising a Barrier, V 
Cut-off, wm 5.6 3.5 4 2.6 2.4 Schottky barrier metal formed in an opening in a silicon 
substrate, each said ogening having a diameter ranging 
from about 50 to 200 A and a depth ranging from about 
2. The sensor of claim 1 wherein said Schottky bar- deposition technique that is capable of depositing metal 
ter. It is preferable to fill in the pores with the metal. 
However, it is satisfactory to have the ofthe pores consisting of platinum. iridium, palladium, cobalt and 
covered completely by a thin, electrically continuous 50 
metal to form the Schottky barrier. ne 3. The sensor of claim 1 further including a silicide 
tion are those convention~~y practiced in portion formed between said silicon substrate and said 
the art and do not constitute a part of this invention. Schottky barrier metal* 
a Schottky 4. The sensor of claim 3 wherein said silicide com- 
diode 25. A plurality of such diodes formed vertically in 55 Prim a member selected from the group consisting of 
the substrate results in lateral stacking of the diodes. the silicides of platinum, iridium, palladium, cobalt and 
A thin silicide layer 26, with thickness ranging from nickel. 
about 1 to 20 nm, may optionally be formed at the me- 5- The sensor of Claim 1 further including a metal 
tal/silicon interface 28 to improve operational charac- contact f m m d  to said Schottky barrier metal. 
teristics of the device by providing a more uniform 60 6. The sensor of claim 5 wherein said metal contact 
Schottky barrier. The structure is depicted in FIG. lb', comprises a metal selected from the group consisting of 
which is an enlargement of portion of FIG. lb. platinum, iridium, palladium, cobalt, nickel, aluminum, 
Advantageously, silicides are stable at higher temper- and gold. 
about 0.1 to 10 minutes in the practice of the invention. comprise in the fabrication pro- 
INDUSTRIAL APPLICABILITY 
in FIG. 1b. Examples of suitable metals include plati- The laterally stacked Schottky diodes described 
herein are expected to find use as infrared sensors. 
TABLE I1 
Schottky Barrier and Wavelength Cut-off 
for Various Metals Contacting Silicon. 
Ir Pd Co Ni 40 pt 
The metal is deposited by electroplating or any other 45 to than pm. 
On the Of the pores with about to 2o nm rier metal comprises a selected from the group 
Each pore filled with metal 
atures, which may be desired for subsequent processing * * * * *  
65 


Laterally stacked Schottky diodes for infrared sensor applications

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