An integrated, optoelectronic, variable thresholding neuron implemented monolithically in GaAs integrated circuit and exhibiting high differential optical gain and low power consumption is presented. Two alternative embodiments each comprise an LED monolithically integrated with a detector and two transistors. One of the transistors is responsive to a bias voltage applied to its gate for varying the threshold of the neuron. One embodiment is implemented as an LED monolithically integrated with a double heterojunction bipolar phototransistor (detector) and two metal semiconductor field effect transistors (MESFET's) on a single GaAs substrate and another embodiment is implemented as an LED monolithically integrated with three MESFET's (one of which is an optical FET detector) on a single GaAs substrate. The first noted embodiment exhibits a differential optical gain of 6 and an optical switching energy of 10 pJ. The second embodiment has a differential optical gain of 80 and an optical switching energy of 38 pJ. Power consumption is 2.4 and 1.8 mW, respectively. Input 'light' power needed to turn on the LED is 2 micro-W and 54 nW, respectively. In both embodiments the detector is in series with a biasing MESFET and saturates the other MESFET upon detecting light above a threshold level. The saturated MESFET turns on the LED. Voltage applied to the biasing MESFET gate controls the threshold

Kim, Jae H.

Lin, Steven H.

Psaltis, Demetri

English

NASA Technical Reports Server

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US005204521A 
United States Patent [19] [11] Patent Number: 5,204,521 
Lin et al. 1451 Date of Patent: Apr. 20,1993 
[54] GAAS-BASED OPTOELECI’RONIC neuron implemented monolithically in a GaAs inte- 
grated circuit and exhibiting high differential optical 
[75] Inventors: Steven H. Lin, Temple City, Calif.; 
NEURONS 
Jae H. Kim, Bellevue, Wash.; 
Demetri Psaltis, Pasadena, Calif. 
[73] Assignee: The United States of America IS 
represented by the Administrrtor of 
the National Aeronautics and Space 
Administration, Washington, D.C. 
[21] Appl. No.: 845,283 
[22] Filed: hk.3,1992 
[51] Int. C l . 5  .............................................. HOlJ 31/50 
[52] US. c1. .............................. 250/214 Is; 307/201; 
250/551 
[58] Field of Sevch ........................... 250/213 A, 551; 
307/201, 311,446,448; 395/25; 364/822 
1561 References Cited 
U.S. PATENT DOC-NTS 
4,951,239 8/1990 Andes et al. ........................ 364/801 
4,956,564 9/1990 Holler et al. ........................ 307/201 
5,130,563 7/1992 Nabet et al. ......................... 307/201 
Primary Examiner-David C. Nelms 
Assistant Examiner-T. Davenport 
Attorney, Agent, or Finn-John H. Kusmiss; Thomas H. 
Jones; Guy M. Miller 
[57l ABSTRA(;T 
An integrated, optoelectronic, variable thresholding 
gain and low power consumption. Two alternative 
embodiments each comprise an LED monolithically 
integrated with a detector and two transistors. One of 
the transistors is responsive to a bias voltage applied to 
its gate for varying the threshold of the neuron. One 
embodiment is implemented as an LED monolithically 
integrated with a double heterojunction bipolar photo- 
transistor (detector) and two metal semiconductor field- 
effect transistors (MESFET’s) on a single GaAs sub- 
strate and another embodiment is implemented as an 
LED monofithically integrated with three MESFET’s 
(one of which is an optical FET detector) on a single 
GaAs substrate. The first noted embodiment exhibits a 
differential optical gain of 6 and an optical switching 
energy of 10 pJ. The second embodiment has a differen- 
tial optical gain of 80 and an optical switching energy or 
38 pJ. Power consumption is 2.4 mW and 1.8 mW, 
respectively. Input “light” power needed to turn on the 
LED is 2 pW and 54 nW, respectively. In both embodi- 
ments the detector is in series with a biasing MESFET 
and saturates the other MESFET upon detecting light 
above a threshold level. The saturated MESFET turns 
on the LED. Voltage applied to the biasing MESFET 
gate, controls the threshold. 
16 Claims, 3 Drawing Sheets 
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GaAs Semi-insulating Submote 
https://ntrs.nasa.gov/search.jsp?R=19930015410 2020-03-24T07:30:38+00:00Z
U.S. Patent Apr. 20, 1993 Sheet 1 of 3 5,204,521 
FIG. 1 
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TIME 'Used FIG. 4 
US. Patent Apr. 20, 1993 Sheet 2 of 3 
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5,204,521 
U.S. Patent Apr. 20, 1993 Sheet 3 of 3 
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2 
OBJECTS OF THE INVENTION GMS-BASED OPTOELECI'RONIC NEURONS 
It is a brincid obiect of the invention to Drovide an 
ORIGIN OF INVENTION 
The invention described herein was made in the per- 
formance of work under a NASA contract, and is sub- 
ject to the provisions of Public Law 96-517 (35 USC 
202) in which the Contractor has elected not to retain 
title. 
TECHNICAL FIELD 
optoelectronic thresholdmg devices and more specifi- 
cally to optoelectronic neurons, implemented monolith- 15 
optoeleckonic'neurin having a large differeitial optical 
5 gain and a low electrical power consumption. 
It is an additional object of the invention to provide 
an optoelectronic neuron that is implemented as an 
LED monolithically with a detector and a 
pair of transistor amplifiers on a G~ substrate. 
It is still an additional object of the invention to pro- 
vide an optoelectronic neuron having an adjustable 
threshold, a high optical gain and a monolithic GaAs- 
BRIEF DESCRIF'TION OF THE DRAWINGS 
10 
The present invention relates generally to integrated b& low consumption. 
as OptOCkCtrOniC integrated Circuits t0 be used for 
8 compact realization Of OptOeleCtrOniC building blocks 
The aforementioned objects and advantages of the 
present invention, as well as additional objects and ad- 
of neural networks. vantages thereof, will be more fully understood herein- 
after as a result of a detailed description of a preferred 
u) embodiment when taken in conjunction with the fol- BACKGROUND ART 
The optical implementation of a neural network con- 
sists of G o  basic-components: a two-dimensional array 
of neurons and interconnections. Each neuron is a non- 
linear processing element that, in its simplest form, pro- 
duces an output which is the thresholded version of the 
input. Liquid crystal spatial light modulators are candi- 
dates for such a two-dimensional array of neurons. 
However, they are not flexible in their use. Optoelec- 
tronic integrated circuits (OEIC's), either hybrid, such 
as liquid crystal on silicon, Si-PLZT, and flip-chip de- 
vices, or monolithic integration in 111-V compounds, 
are another solution. In order for these devices to be 
used as neurons in a practical experiment, they must be 
large in number (104/cm2-106/cm~) and exhibit high 
gain. This puts a stringent requirement on the electrical 
power dissipation. Thus, these devices have to be oper- 
ated at low enough current levels so that the power 
dissipation on the chip does not exceed the heat-sinking 
capability, and yet the current levels need to be large 
enough to be able to produce high gain. This means 
sensitive input devices are a must. To achieve these 
goals, the speed requirement of the devices must be 
relaxed as the operation of neural network does not 
have to be too fast. 
STATEMENT OF THE INVENTION 
The present invention comprises an optoelectronic 
thresholding device which in one embodiment is imple- 
mented as an LED monolithically integrated with a 
double heterojunction bipolar phototransistor (detec- 
tor) and two metal semiconductor fieldeffect transis- 
tors (hfESFET's) on a single GaAs substrate and an- 
other embodiment is implemented as an LED monolith- 
ically integrated with three MESFET's (one of which is 
an optical FET detector) on a single GaAs substrate. 
The first noted embodiment exhibits a different optical 
lowing drawings in which: 
ment of the invention; 
FIG. 1 is a schematic illustration of a first embodi- 
FIG. 2 is a cross-sectional view of the monolithic 
FIG. 3 is a graph of optical input power versus opti- 
cal output power for two different biasing voltages of 
the first embodiment of the invention; 
FIG. 4 is a graph illustrating the response time of the 
FIG. 5 is a schematic illustration of a second embodi- 
ment of the invention; and 
FIG. 6 is a graph of optical input power versus opti- 
cal output power for the second embodiment of the 
25 structure of the present invention; 
30 invention; 
35 invention. 
DETAILED DESCRIPTION OF THE 
INVENTION 
The present invention comprises an optoelectronic 
4.0 neuron that monolithically integrates a detector, 2 tran- 
sistor amplifiers, and a light source on a single GaAs 
substrate. LEDs have been chosen as the light source, 
as opposed to lasers, because no threshold currents are 
needed to drive the LEDs so that a large array of neu- 
45 rons at low currents is possible and LEDs are inher- 
ently simpler to fabricate. The circuit diagram of a first 
embodiment of the optoelectronic neuron of the inven- 
tion is shown schematically in FIG. 1. A switching 
circuit at the input is formed by connecting a double 
50 heterojunction bipolar phototransistor in series with a 
biasing MESFET. Upon detecting enough incoming 
light, the phototransistor becomes saturated, thus pull- 
ing up the sourcedrain voltage across the biesing MES- 
FET. This voltage turns on the other MESFET, which, 
55 in turn, drives the LED to emit light. The input thre- 
sholding characteristics are controlled by the gate volt- 
age, VB, of the biasing MESFET. The larger the VB is, 
the larger the threshold is because the photocurrent gain of 6 and an optical switching energy of 10 @: The 
second embodiment has a differential optical gain Of 80 genera& by the phohtmistor has to sa&fy the cur- 
and an optical switching energy of 38 @. Power con- 60 rent drawn by the biasiig MESFET before the excess 
sumption is 2.4 mW and 1.8 mW, respectively. Input current can flow to the gate of the LED-driving MES- 
"light" power needed to turn on the LED is 2 pw and FET and charge up its gate. The output saturation is 
54 nW, respectively. In both embodiments the detector provided by the finite swing of the gate voltage in the 
is in series with a biasing MESFET and saturates the driving MESFET. The differential gain of the neuron 
other MESFET upon detecting light above a threshold 65 before becoming saturated is determined by the slopes 
level. The saturated MESFET turns on the LED. Volt- in the I-V curves of the phototransistor and the biasing 
age applied to the biasing MESFET gate, controls the MESFET. If the slopes for these two transistors are 
threshold. zero, the differential gain in the neuron would be infi- 
3 
5,204.521 
nite. Thus, by minimizing t h e  s l o p ,  Such an inte- 
grated optoelectronic neuron is capable of turning on 
the neuron at very low input light levels. This is essen- 
tial for systems, such as neural networks, that require 
large gains, large number of neurons, and yet low 
enough power dissipation on the chip. 
The cross scction of the optoelectronic neuron is 
shown in FIG. 2. The epitaxial layers are grown by 
MOCVD. Upon standard substrate cleaning processes, 
the substrate is subjected to two chemical wet etchings 
in defining each device in a neuron and isolating the 
adjacent neurons. A Zndif€usion down to the active 
p-GaAs layer through a loo0 Angstrom-thick SbN4 
mask is then followed to form a double heterojunction 
LED. Another shallower, yet wider Zndif€usion is 
performed to aid the current flow through the LED so 
that the emitted light is not under the evaporated metals 
of the LED. Appropriate windows are subsequently 
opened for all AuGe/Ni/Au n-type contact evapora- 
tiom, and are followed by proper alloying. The gates of 
the MESFET’s arc receseed from the surface and are 
defined by etching and measuring the sourcedrain cur- 
rents at the same time. Once the proper recessed depths 
for the gates are determined, Ti/Au are evaporated to 
form the gates and also to interconnect the devices. The 
size of a fabricated optoelectronic neuron is about 
2.00~200 pmz. The gates for the biasing and driving 
MESFET’s are measured to be 6 X 70 pm2 and 6 X 100 
pm2. The LED and the phototransistor light-sensitive 
areas are 40x40 pm2 and 80x60 pm2, respectively. 
FIG. 3 shows the measured input-output characteris- 
tics of an optoelectronic neuron. A variable threshold 
controlled by the gate voltage of the biasing MESFET, 
V& is clearly evident in FIG. 3. For the curve at 
Vg= -3 V, the output initially remains close to zero for 
input up to 3 pW, then rises to 12 pW within 2 pW of 
input light power. This implies a differential optical 
gain of 6 in the neuron. The output of the neuron con- 
tinues to rise gradually as the input increases further. 
The differential optical gain of 6 is limited by the leak- 
age currents across the gatedrain schottky diodes in 
curves of the phototransistor and the biasing MESFET. 
With further reduction in the doping concentration in 
the MESFET’s conduction n- layer and an increase in 
the doping concentration in the phototransistor’s base 
layer, the optical differential gain can be further im- 
proved. It is noted that the output saturation levels for 
Vg=-3 V and V ~ = - 2 . 4  V curves are different 
owing to a higher commonunittcr saturation voltage 
for the phototransistor, VC-T, and thus a d e r  
swing in the switching circuit for the V ~ = - 2 . 4  V 
curve. When characterized individually, the LED and 
the phototransistor arc measured to exhibit efficiencies 
of 0.01 W/A and 1 A/W, respectively, and the trans- 
conductance of the MESFET’s, &,, is measured to be 
20 mS/mm. The efficiencies in the LED and the photo- 
transistor are limited by the thick @.As layer in both 
devices, which causes self-abmrption in the LED and 
the degradation in the cumnt gain, 8, of the phototran- 
&or. It is expected that much improvement can be 
obtained by reducing the thickness of this layer. The 
current through the LED is about 1.2 mA, which im- 
tion per neuron is about 2.4 mW. The response of the 
neuron is measured to be 5 pscc as shown in FIG. 4, and 
is found to be limited by the charging of the capacitors 
in the circuits. With these results, the optical switching 
both MESFET’S 11s Well as the ftnite s l o p  in the I-V 
plies, with vDD=2 v, the electrid power consump 
4 
energy per neuron is thus calculated to be (2 pW) X (5 
WC)= 10 pJ. 
The circuit diagram of an alternative embodiment of 
the optoelectronic device of the presmt invention is 
5 shown schematically in FIG. 5. A switching circuit at 
the input is formed by connecting an optical FET (OP- 
FET) in series with a biasing MESFET. Upon detecting 
drain voltage across the biasing MESFET. This voltage 
10 turns on the other MESFET, which, in turn, drive the 
LED to emit light. 
FIG. 6 shows the measured input-output characteris- 
tics of the optoelectronic thresholding device with VB 
floating. A differential optical gain of 80 is observed as 
l5 an input beam of 54 nW incident on the OPFET causes 
the LED to emit additional 4.3 pW. The differential 
optical gain of 80 is achieved as a result of an extremely 
sensitive input switching circuit formed by the OPFET 
and the MESFET in series with it. The current flowing 
through the LED when the device is ~mt~d is 900 
pA. With a power supply of 2 V, this implies the electri- 
cal power dissipation is 1.8 mW per device. This electri- 
cal power can be reduced by a factor of 2 by recessing 
the gate of the LEDdriving MESFET further to the 
” appropriate depth so that this MESFET does not con- 
duct current when there is no optical input The &- 
ciency of the LED and the OPFET are 0.01 W/A and 
0.3 A/W, respectively. The transconductance of the 
x, LEDdriving MESFET is 60 mS/mm with a source- 
drain breakdown of 25 V. The rise and the fall times arc 
measured to be 700 pscc and 40 pscc, respectively. 
Thus, the optical switching energy can be calculated to 
be (54 nW)~(700  pscc)=38 pJ. This is comparable to 
35 results for the embodiment of FIG. 1 of 10 pJ as the 
switching energy is expected to be the same for charg- 
ing up the transistor of the same sizc. However, the 
second embodiment shows a substantially lower power 
(54 nW vs. 2 pW) needed to turn the LED on. This 
40 means higher sensitivities at the input, and thus overall 
higher optical gains for the optoelectronic thresholding 
devices. 
It will now be understood that what has kea dis- 
closed herein comprises an integrated, optoelectronic, 
45 variable thresholding neuron implemented monolithi- 
cally in a GaAs integrated circuit and exhibiting high 
differential optical gain and low power consumption. 
Two alternative embodiments each comprise an LED 
monolithically integrated with a detector and two tran- 
50 &tors. One of the transistors is responsive to a bias 
voltage applied to its gate for varying the threshold of 
the neuron. 
Having thus described two exemplary embodiments 
of the invention, what is claimed is: 
1. An optoelectronic neuron compriaing: 
a light detector; 
a first transistor in M i e s  connection with said light 
detector and having an output rrsponsive to the 
detection of light by said detector; 
a second transistor connected to said output of mid 
first transistor for switching on and off rerponrive 
to the voltage at said output; and 
a light source connected in series with said acccmd 
transistor, said light source generating light when- 
ever said second transistor is switched on. 
2. The optoelectronic neuron recited in claim 1 
wherein said first transistor has an input for receiving a 
biasing voltage, the magnitude of said biasing voltage 
enough incoming light, the OPFET pulls UP the source- 
55 
60 
65 
5,204,521 
6 5 
establishing a selectively variable light threshold for 10. The optoelectronic neuron recited in claim 9 fur- 
said detector. ther comprising means for adjusting said selected 
3. The optoelectronic neuron recited in claim 1 threshold. 
wherein said frst and second transistor comprise metal- 11. The Optoelectronic neuron recited in C h h l  9 
semiconductor field-effect transistors. 5 wherein said light detector comprises a double hetero- 
junction bipolar ~hototraistor. 
wherein said light detector comprises a double hetero- 
wherein said light detector comprises M optical field- 
effect transistor. 
13. The optoelectronic neuron recited in claim 9 
wherein said light source comprises a lightemitting 
diode. 
wherein said interconnecting means comprises first and 
15 second transistors, said first transistor being in series 
connection with said light detector and h a k g  Bn out- 
and said to said out- 
put of said first transistor for switching on and off re- 
output; said light souTce 
being connected in series with said -nd w a r .  
15. The optoelectronic neuron recited in claim 14 
wherein said f j t  transistor has an input for receiving a 
biasing voltage, the magnitude of said biasing voltage 
25 establishing a selectively variable light threshold for 
16. The optoelectronic neuron recited in claim 14 
wherein said first and second transistor comprise metal- 
semiconductor fieldeffect transistors. 
4. The optoelectronic neuron recited in claim 1 
12. The optoelectronic recited in 
junction bipolar phototransistor. 
wherein said light dewtor comprises an 
effect transistor. 
6. The optoelectronic neuron recited in claim 1 
wherein said light source comprises a lightcmitting 
diode. 
7. The optoelectronic neuron recited in claim 1 
tors and said light source are integrated into a mono- 
lithic semiconductor structure. 
wherein said semiconductor structure comprises G d s .  
9. A GaAs-based monolithically integrated Optoelec- 
tronic neuron having variable thresholding for amplify- 
ing light detected above a selected threshold level; said 
neuron comprising: 
5. The optoelectronic neuron recited in claim 1 
field- 10 
14. The optoelectronic racited in claim 
wherein said light detector, said fvSt and second transis- put responsive to the detection offight by said deter 
&=istor being 
8. The Optoelectronic neuron recited in Claim 7 20 sponsive to a voltage at 
a light detector; said detector. 
a light source; and 
means interconnecting said detector and source for 
activating said source upon detection of light 
above said selected threshold. 30 * * * * *  
35 
45 
55 
60 
65 


GaAs-based optoelectronic neurons

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