This paper reports on a student project performed at the University of Southampton jointly by 4th year MEng students within the course "Advanced Radio Communications". The aim was to design a software modem capable of transmitting 16kb/s of data, whereby random number generation, advanced modulation, pulse shaping, synchronisation, and error counting techniques had to be applied. The ultimate aim was the implementation on a Texas Instruments TMS320-C6201 EVM board, which dictated some of the specifications of the design

Braithwaite, SJ

Stewart, RD

Weiss, S

English

This paper reports on a student project performed at the University of Southampton jointly by 4th year MEng students within the course “Advanced Radio Communications”. The aim was to design a software modem capable of transmitting 16kb/s of data, whereby random number generation, advanced modulation, pulse shaping, synchronisation, and error counting techniques had to be applied. The ultimate aim was the implementation on a Texas Instruments TMS320-C6201 EVM board, which dictated some of the specifications of the design

Weiss, Stephan

Braithwaite, Steve

Stewart, R. David

Name not available

Software pi/4-DQPSK modem : a student project using the TMS320C6201 EVM

University of Strathclyde Institutional Repository

Strathprints Institutional RepositoryWeiss, Stephan and Braithwaite, Steve and Stewart, R. David (2000) Software pi/4-DQPSK modem: a student project using the TMS320C6201 EVM. In: 3rd European DSP Education and ResearchConference, 2000-09-20 - 2000-09-22, Paris.Strathprints is designed to allow users to access the research output of the University of Strathclyde.Copyright c© and Moral Rights for the papers on this site are retained by the individual authorsand/or other copyright owners. You may not engage in further distribution of the material for anyprofitmaking activities or any commercial gain. You may freely distribute both the url (http://strathprints.strath.ac.uk/) and the content of this paper for research or study, educational, ornot-for-profit purposes without prior permission or charge.Any correspondence concerning this service should be sent to Strathprints administrator:mailto:strathprints@strath.ac.ukhttp://strathprints.strath.ac.uk/Software /4-DQPSK Modem:A Student Project Using the TMS320C6201 EVM BoardStephan Weiss, Steve J. Braithwaite, and R. David StewartCommunications Research GroupDept. of Electronics & Computer ScienceUniversity of SouthamptonSouthampton SO17 1BJ, UKfsw1,sjb,rdsg@ecs.soton.ac.ukAbstract. This paper reports on a student project performed at the University of Southamptonjointly by 4th year MEng students within the course “Advanced Radio Communications”. The aimwas to design a software modem capable of transmitting 16kb/s of data, whereby random numbergeneration, advanced modulation, pulse shaping, synchronisation, and error counting techniques hadto be applied. The ultimate aim was the implementation on a Texas Instruments TMS320-C6201EVM board, which dictated some of the specifications of the design.1. INTRODUCTIONCommunications theory is an essential part of the 3 and 4 year courses in electronic engineeringrelated studies at the University of Southampton. Besides a strong emphasis of the fundamentals,the students are encouraged to also gain experience on a systems level. For this purpose, a course“Advanced Radio Communications” for 4th year MEng student in the academic year 1999/00 wasconcerned with the design and implementation of a software =4-DQPSK modem. In this paper, weaim to give an overview of the aspects considered in the modem, and how the implementation wasorganised in order to permit modularity and testing.The overall setup of the software modem is shown in Fig. 1, with independent units for transmit-ter and receiver. The transmitter maps an incoming bit stream onto inphase and quadrature signalsmodulated by =4 differential QPSK [1]. After upsampling both inphase and quadrature component,Kingsbury filters h1[n] are applied for pulse shaping in order to restrict the bandwidth and to pro-hibit intersymbol-interference (ISI) on the receiver end [3, 5]. After digital-to-analogue conversion,standard laboratory hardware can be used to further modulate the signals, add noise interference, orapply amplitude and phase distortion to the signals.The receiver was designed to run at 16 the symbolrate to provide high resolution for the clockrecovery. As the ADC imposed restrictions, the analogue inphase and quadrature signals were sam-pled at 32kHz and upsampled to 128kHz. The filters h2[n] are suitably selected Kingsbury filters [3]4444[n]h2[n]h2pi/4-DQPSK1616pi/4-DQPSK [n]h1[n]h116kb/sstereoADCdemodulationrecoveryclockcounterrorTMS320-C6201TxRxpseudo- randomgenerationnumber parallel/serialparallelserial /modulationstereoDACEVMFig. 1: Baseband unit of a 16kb/s modem on a TMS320-C6201 EVM board producing inphase andquadrature signals; the transmitter and receiver units are independent and can be placed on separateDSPs.0 10 20 30 40 50 60 70 80−10123456time nimpulse responseh1[n]h2[n]44 16[ ]nh2[ ]nh1Fig. 2: (left) impulse responses of Kingsburyfilters h1[n] and h2[n]; (right) the concatena-tion of upsamplers by 4, Kingsbury filters, anddecimation by 16 forms a Nyquist system.working as both interpolation filters and pulse shaping / matched filters. After =4-DQPSK demodu-lation, and a robust clock recovery, the originally transmitted bit stream should have been recovered.For testing purposes, the transmitted bit stream was created on-board by a pseudo-random numbergenerator, as shown in the block diagram in Fig. 1. When synchronised, the same generator could beemployed in the receiver part to count potential errors occuring due to channel distortions introducedbetween transmission and reception of the signal. This distortion could either be imposed on theexternal IF or HF lab equipment, or in a testing stage by adding Gaussian noise to an internal linkfrom the transmitter output to the receiver input.In the following, we discuss the system that was implemented by our students as course work.Sec. 2 will be dedicated to the transmitter circuit, including both the data generation, modulation, andpulse shaping. The transmission through an internal or external channel is subject of Sec. 3. Detailsof the receiver are disclosed in Sec. 4, and the error counting method for testing and simulationpurposes are described in Sec. 5. Finally, the organisation of students’ contributions and a briefexplanation of the implementation on the TMS320-C6201 EVM are reported in Sec. 6.2. TRANSMITTEROn the transmitter side, a pseudo-random number (PRN) generator is employed to produce a bitstream at 16kbits/s. The PRN are produced by a linear feedback shift register of 32 bits length,and feedback is based on a primitive polynomial yielding a maximum length sequence that onlyrepets after 232 iterations. As indicated in Fig. 1, this bitstream is multiplexed onto an inphase andquadrature channel both running at 8kbits/s.A =4 differential quadrature phase shift keying (DQPSK) transfers the two channels onto in-phase and quadrature components via a constellation map. The rationale behind employing a pi=4phase shift between successive constellations is that the envelope will be non-zero at all times andhence offers advantages with respect to the potential non-linearity of amplifiers utilised in subse-quent analogue modulation stages [1]. The differential encoding is implemented using a lookuptable, whereby depending on the current symbol value, the phase is rotated by a given amount of=4+n =2, n 2 f0; 1; 2; 3g. The inphase and quadrature component are output at the symbol rateof 8kHz.For a bandlimited transmission, Kingsbury filters [3] were employed. In the original specification,the analogue system part was to be simulated by oversampling the signals by a factor of 16 to128kHz. At this rate, the timing recovery was to take place in the receiver. As however the DACson the EVM board are laid out for audio applications, the maximum DAC rate of 48kHz set a limit.To cope with this, the signals were only oversampled by a factor of 4 in the transmitter to 32kHzand output through the DACs. For data acquisition, the sampling rate was again set to 32kHz, butupsampling by a factor of 4 gave the desired oversampling factor of 16 with respect to the symbolrate in order to perform the timing recovery with sufficient resolution at 128kHz.The split into different sampling rates was performed with two Kingsbury filters h1[n] and h2[n]with 20 and 80 coefficients respectively as shown in Fig. 2(a). The upsampling to 128kHz in thereceiver in two stages and subsequent decimation is given in Fig. 2(b). The overall circuit in Fig. 2(b)forms a Nyquist system allowing perfect recovery of the transmitted symbols in the absence ofquantisation and channel distortions.0 5 10 15 20 25 30−1.5−1−0.500.511.5sample pointsamplitude0 5 10 15 20 25 30−1−0.8−0.6−0.4−0.200.20.40.60.81sample pointsamplitudeFig. 3: (left) eye diagram of =4-DQPSK modulated inphase without distortion; (right) inphasecomponent after derotation in the receiver.3. CHANNEL SIMULATIONThe output of the transmitter, sampled at 32kHz, are passed to the stereo DAC on the EVM board.The resulting analogue signals for inphase and quadrature component can be modulated up to IF andRF by analogue lab hardware, and modulated back down again to baseband. The baseband signalcan finally be sampled at 32kHz in the stereo ADC and fed to the receiver circuitry implemented onthe EVM board.Alternatively, the inputs to the DAC can be connected to the outputs of the ADC by software,hence implementing a complete simulation environment on the board. In the implementation pur-sued in this project, white Gaussian noise can be added to this channel. The Gaussian noise is derivedfrom two uniformly distributed random variables (created by LFSRs) through the Box-Mu¨ller algo-rithm [4].4. RECEIVERThe receiver circuit as shown in Fig. 1 consists of the matched Kingsbury filter h2[n] operated atthe upsampled rate of 128kHz, followed by the =4-DQPSK demodulation, and the timing recovery.The optimal filtering was already discussed in Sec. 2, and results in the eye diagram given in Fig. 3.It clearly shows the =4 rotation between the symbol spaced eye points with 2 or 3 distinct levels.The =4-demodulation performs a rotation of the data by =4 over a symbol period, such thatthe resulting derotated inphase and quadrature signals exhibit the characteristics of the eye diagramshown in Fig. 3(right). This derotated signal can now be employed for timing recovery by searchingfor the symbol spaced crossing points. The timing recovery employed here is based on subtractingthe level of the eyepoint from the modulus of the inphase or quadrature signal. From the currentsymbol sampling point, the variance in the two adjacent oversampled bins is measured over 512symbol periods. Then the bin with the lowest variance is selected as the new symbol samplingpoint. This procedure works for both intial synchronisation and potential clock mismatch betweentransmitter and receiver. Thus, the symbols are extracted from the oversampled I and Q componentsby decimation by a factor of 16.Finally, the data is decoded via a QPSK constellation map and multiplexed onto a single bitstream. Detection and counting of errors in the bit stream with respect to the transmitted sequencewill be discussed in the following.5. ERROR COUNTThe error counting method is closely connected to the PRN generation in the transmitter, and isperformed in two stages depicted in the flow graph in Fig. 4. In a synchronisation stage, synchroni-sation with the pseudo-random number generator in the transmitter is established. Synchronisationis achieved by feeding the received sequence into a LFSR with a generator polynomial identical tothe transmitter. In the second stage, the synchronised PRN generator is switched to feedback mode,and the the produced PRN sequence is compared to the received sequence. Any mismatch in the twobit streams is counted as a bit error.(2)(1)bitstreamreceived Xlinear feedback shift registerFig. 4: Error counter in the receiver:in switch position (1), X = 0 indi-cates synchronisation; in switch posi-tion (2),PX gives number of errorsoccured (after synchronisation).6. PROJECT ORGANISATION AND IMPLEMENTATIONThe project was performed by three students, amongst whom the responsibilities for different partsof the transmitter and receiver implementation were shared. Additionally, one student was assignedresponsibility for the overall software integration. The main software loop was dictated by the framesynchronisation provided by the communication between the DSP processor and the DAC/ADCcodec chip [2]. In this loop, the other functions were then integrated.The attention of the students was particularly drawn towards the computational budgeting, and thefixed point arithmetic of the processor used. For the budgeting, the computationally most intensivetask was identified to be the pulse shaping. To exploit redundancies, the multiplication with expand-ing zeros introduced by upsampling by a factor 4 were avoided by polyphase implementations of thefilters h1[n] and h2[n] [6]. This polyphase implementation introduced computational savings by afactor of 4 comapred to the direct flow graph implementation of Fig. 1. With regards to fixed pointarithmetic, the filter coefficients and signal were scaled such the likelihood for an overflow would beminimum as long as the channel noise added according to Sec. 3 was within the minimum specifiedSNR limit of 0 dB.7. CONCLUSIONSWe have reported on the implementation of a complete software modem with separate transmitterand receiver units involving modulation and pulse shaping. The data to be transmitted was simulatedby a PRN generator. Distortion was introduced in the form of channel noise. An error counter inthe receiver was described that allowed to account for any bit errors resulting from this channeldistortion. Additionally, the channel and any further IF or RF modulations could be added into anexternal loop via the stereo DAC and ADC on the EVM board.7. REFERENCES[1] A. H. Aghvami. “Digital Modulation Techniques for Mobile and Personal CommunicationSystems”. Electronics & Communication Engineering Journal, Vol.5(No.3):pp.125–132, June1993.[2] S. Dirksen. An audio example using dsp/bios. Texas Instruments Application Report SPRA598,November 1999.[3] N. G. Kingsbury. “Transmit and Receive Filter for QPSK Signals to Optimise the Performanceon Linear and Hard-Limited Channels”. IEE Proceedings F, Vol.133(No.4):pp.345–355, July1986.[4] A. Papoulis. Probability, Random Variables, and Stochastic Processes. McGraw-Hill, NewYork, 3rd edition, 1991.[5] B. Sklar. Digital Communications: Fundamentals and Applications. Prentice Hall, EnglewoodCliffs, 1988.[6] P. P. Vaidyanathan. Multirate Systems and Filter Banks. Prentice Hall, Englewood Cliffs, 1993.

An audio example using dsp/bios. Texas Instruments Application Report SPRA598,

An audio example using dsp/bios. Texas InstrumentsApplication Report SPRA598,

Digital Communications: Fundamentals and Applications.

Digital Modulation Techniques for Mobile and Personal Communication Systems”.

Multirate Systems and Filter Banks.

Probability, Random Variables, and Stochastic Processes.

Transmit and Receive Filter for QPSK Signals to Optimise the Performance on Linear and Hard-Limited Channels”.

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Software pi/4 DQPSK Modem: A Student Project Using the TMS320-C6201 EVM Board

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Software pi/4 DQPSK Modem: A Student Project Using the TMS320-C6201 EVM Board

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