Procedure performs all work required for logic design of digital counters or sequential circuits and simplification of Boolean expressions. Program provides simple, accurate, and comprehensive logic design capability to users both experienced and totally inexperienced in logic desig

Gussow, S.

Oglesby, R.

English

This manual presents a computer program that performs all the work required for the logic design of digital counters or sequential circuits and the simplification of Boolean logic expressions. The program provides both the experienced and inexperienced logic designer with a comprehensive logic design capability. The manual contains Boolean simplification and sequential design theory, detailed instructions for use of the program, a large number of illustrative design examples, and complete program documentation

Sussow, S.

NASA Technical Reports Server

Computerized logic design of digital circuits

November 1974	 B74-10225 
NASA TECH BRIEF 
Marshall Space Flight Center 	 4:v 
NASA Tech Briefs announce new technology derived from the U.S. space program. They are issued to encourage 
commercial application. Tech Briefs are available on a subscription basis from the National Technical Information 
Service, Springfield, Virginia 22151. Requests for individual copies or questions relating to the Tech Brief program may 
be directed to the Technology Utilization Office, NASA, Code KT, Washington, D.C. 20546. 
Computerized Logic Design of Digital Circuits 
The problem: 
Logic design is tedious and laborious work. 
The solution: 
A computerized logic design procedure is presented 
for a specially-developed computer program that per-
forms all work required for the logic design of digital 
counters or sequential circuits and the simplification of 
Boolean expressions. The program provides a simple, 
accurate, and comprehensive logic design capability to 
users both experienced and totally inexperienced in 
logic design. 
How it's done: 
The program has been developed for two modes of 
operation: counter design and Boolean simplification. In 
the counter design mode, the program provides simpli-
fied flip-flop input equations for any desired sequence 
and for using any type of flip-flop. The simplified logic 
equations can be obtained in either sum-of-product or 
product-of-sum form for any -one or all of the flip-flop 
types. The program also provides printouts of the 
intermediate design steps used in obtaining the flip-flop 
input equations. In the Boolean simplification mode, the 
program simplifies Boolean logic functions that can be 
entered in either sum-of-product or product-of-sum 
form. 
The counter design mode can also be used for the 
design of sequential circuits other than counters. The 
program can be used for any sequential design applica-
tion where a group of flip-flops is required to change 
states in a prescribed order: 
a. Each flip-flop is assigned a binary bit representation 
which provides an equivalent count sequence for the 
prescribed state changes.
b. The equivalent count sequence is read into the 
computer in the same way as is done for regular 
counter designs. 
c. The program provides the logic equations that will 
cause the flip-flops to change states in the prescribed 
order. 
Considerable effort was expended in the develop-
ment of these programs, to reduce the input data 
requirements to the simplest level possible and to 
present the output results in a self-explanatory and 
instructive format. The required input to the program is 
the data a designer usually begins with for hand cal-
culations. For counter designs, the input is the type of 
flip-flop and the count sequence in decimal numbers. 
The output is the simplified logic equations in proper 
form for direct implementation with the specified flip-
flops and the desired digital gates. For Boolean simpli-
fication, the function is read in and printed out in its 
normal handwritten form. 
The program also instructs the user in counter 
design by printing out the intermediate design steps 
used in obtaining the simplified logic equations. These 
intermediate steps are the same as those that would be 
performed if the counter were designed by hand, and 
they include the flip-flop transition input requirements 
and the counter truth table. Hence, each program 
printout also serves as an instructive design example and 
demonstrates the design procedure used. The printouts 
of these intermediate steps can be suppressed by a simple 
option if desired. 
The program greatly reduces the amount of time 
and effort required for logic design. Most counter design 
methods are fairly straightforward but do involve much 
work for long count sequences or unordered sequences, 
especially when logic equations are desired for more 
.
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
(continued overleaf) 
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights.
https://ntrs.nasa.gov/search.jsp?R=19740000225 2020-03-17T13:55:12+00:00Z
. 
than one type of flip-flop. A useful feature of the 
program is that for a given count sequence counter 
design equations can be obtained for several or all of 
the available types of flip-flops. The designer can 
compare these equations for simplicity or some other 
desired characteristic and then can select the optimum 
type of flip-flop for the given sequence.
Notes: 
1. This program was written in FORTRAN IV for the 
UNIVAC 1108 computer. 
2. Inquiries concerning this program should be directed 
to:
COSMIC 
112 Barrow Hall 
University of Georgia 
Athens, Georgia 30601 
Reference: MFS-22401
Source: S. Gussow and 
R. Oglesby of
Sperry Rand Corp.
under contract to
Marshall Space Flight Center
(MFS-22401)
. 
B74-10225	 Category 09, 01, 02


Computerized logic design of digital circuits

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